生成的代码包
This commit is contained in:
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#include "app_config.h"
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SECTIONS
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{
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.text : ALIGN(4)
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{
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gsensor_dev_begin = .;
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KEEP(*(.gsensor_dev))
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gsensor_dev_end = .;
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fm_dev_begin = .;
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KEEP(*(.fm_dev))
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fm_dev_end = .;
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fm_emitter_dev_begin = .;
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KEEP(*(.fm_emitter_dev))
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fm_emitter_dev_end = .;
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storage_device_begin = .;
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KEEP(*(.storage_device))
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storage_device_end = .;
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imusensor_dev_begin = .;
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KEEP(*(.imusensor_dev))
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imusensor_dev_end = .;
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#if TCFG_APP_PC_EN
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aac_dec_code_begin = .;
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*(.bt_aac_dec_code)
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*(.bt_aac_dec_sparse_code)
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aac_dec_code_end = .;
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aac_dec_code_size = aac_dec_code_end - aac_dec_code_begin ;
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. = ALIGN(4);
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bt_aac_dec_const_begin = .;
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*(.bt_aac_dec_const)
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*(.bt_aac_dec_sparse_const)
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bt_aac_dec_const_end = .;
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bt_aac_dec_const_size = bt_aac_dec_const_end - bt_aac_dec_const_begin ;
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*(.bt_aac_dec_data)
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*(.bt_aac_dec_bss)
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. = ALIGN(4);
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*(.aac_mem)
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*(.aac_ctrl_mem)
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/* . += 0x5fe8 ; */
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/* . += 0xef88 ; */
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#endif
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. = ALIGN(32);
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}
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.data ALIGN(32):
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{
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} > ram0
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.bss ALIGN(32):
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{
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} > ram0
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.data_code ALIGN(32):
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{
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} > ram0
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}
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@@ -0,0 +1,164 @@
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OVERLAY : AT(0x200000) SUBALIGN(4)
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{
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.overlay_aec
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{
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aec_code_begin = . ;
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*(.text._*)
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*(.data._*)
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*(.aec_code)
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*(.aec_const)
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*(.res_code)
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*(.res_const)
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*(.ns_code)
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*(.ns_const)
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*(.bark_const)
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*(.fft_code)
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*(.fft_const)
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*(.agc_code)
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*(.dms_code)
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*(.dms_const)
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*(.dms_sparse_code)
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aec_code_end = . ;
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aec_code_size = aec_code_end - aec_code_begin ;
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*(.msbc_enc)
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*(.cvsd_codec)
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*(.aec_bss)
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*(.aec_data)
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*(.res_data)
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*(.ns_data)
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*(.dns_common_data)
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*(.dns_param_data_single)
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*(.dns_param_data_dual)
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*(.jlsp_nlp_code)
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*(.jlsp_nlp_const)
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*(.jlsp_aec_code)
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*(.jlsp_aec_const)
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*(.jlsp_prep_code)
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*(.jlsp_prep_const)
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*(.jlsp_enc_code)
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*(.jlsp_enc_const)
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*(.jlsp_wn_code)
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*(.jlsp_wn_const)
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*(.jlsp_tri_code)
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*(.jlsp_tri_const)
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*(.jlsp_agc_code)
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*(.jlsp_agc_const)
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*(.res_bss)
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*(.ns_bss)
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*(.aec_mem)
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}
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.overlay_aac
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{
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#if !TCFG_APP_PC_EN
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aac_dec_code_begin = .;
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*(.bt_aac_dec_code)
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*(.bt_aac_dec_sparse_code)
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aac_dec_code_end = .;
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aac_dec_code_size = aac_dec_code_end - aac_dec_code_begin ;
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. = ALIGN(4);
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bt_aac_dec_const_begin = .;
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*(.bt_aac_dec_const)
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*(.bt_aac_dec_sparse_const)
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bt_aac_dec_const_end = .;
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bt_aac_dec_const_size = bt_aac_dec_const_end - bt_aac_dec_const_begin ;
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*(.bt_aac_dec_data)
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*(.bt_aac_dec_bss)
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. = ALIGN(4);
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*(.aac_mem)
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*(.aac_ctrl_mem)
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/* . += 0x5fe8 ; */
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/* . += 0xef88 ; */
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#endif
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}
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/*
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.overlay_lc3
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{
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lc3_dec_code_begin = .;
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*(.lc3_dec_code)
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lc3_dec_code_end = .;
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lc3_dec_code_size = lc3_dec_code_end - lc3_dec_code_begin;
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. = ALIGN(4);
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lc3_dec_const_begin = .;
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*(.lc3_dec_const)
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lc3_dec_const_end = .;
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lc3_dec_const_size = lc3_dec_const_end - lc3_dec_const_begin;
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*(.lc3_dec_data)
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*(.lc3_dec_bss)
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}
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*/
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.overlay_mp3
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{
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*(.mp3_mem)
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*(.mp3_ctrl_mem)
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*(.mp3pick_mem)
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*(.mp3pick_ctrl_mem)
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*(.dec2tws_mem)
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}
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.overlay_wma
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{
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*(.wma_mem)
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*(.wma_ctrl_mem)
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*(.wmapick_mem)
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*(.wmapick_ctrl_mem)
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}
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.overlay_wav
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{
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*(.wav_mem)
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*(.wav_ctrl_mem)
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}
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.overlay_ape
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{
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*(.ape_mem)
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*(.ape_ctrl_mem)
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}
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.overlay_flac
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{
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*(.flac_mem)
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*(.flac_ctrl_mem)
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}
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.overlay_m4a
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{
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*(.m4a_mem)
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*(.m4a_ctrl_mem)
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}
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.overlay_amr
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{
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*(.amr_mem)
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*(.amr_ctrl_mem)
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}
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.overlay_dts
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{
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*(.dts_mem)
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*(.dts_ctrl_mem)
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}
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.overlay_fm
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{
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*(.fm_mem)
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}
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.overlay_pc
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{
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*(.usb_audio_play_dma)
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*(.usb_audio_rec_dma)
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*(.uac_rx)
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*(.mass_storage)
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*(.usb_ep0)
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*(.usb_msd_dma)
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*(.usb_hid_dma)
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*(.usb_iso_dma)
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*(.usb_cdc_dma)
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*(.uac_var)
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*(.usb_config_var)
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*(.cdc_var)
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}
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} > ram0
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@@ -0,0 +1,20 @@
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#ifndef BOARD_CONFIG_H
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#define BOARD_CONFIG_H
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/*
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* 板级配置选择
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*/
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#define CONFIG_BOARD_JL701N_DEMO
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#include "board_jl701n_demo_cfg.h"
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#define DUT_AUDIO_DAC_LDO_VOLT DACVDD_LDO_1_25V
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#ifdef CONFIG_NEW_CFG_TOOL_ENABLE
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#define CONFIG_ENTRY_ADDRESS 0x6000100
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#endif
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#endif
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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#ifndef CONFIG_BOARD_JL701N_DEMO_POST_BUILD_CFG_H
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#define CONFIG_BOARD_JL701N_DEMO_POST_BUILD_CFG_H
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/* 改文件只添加和isd_config.ini相关的配置，用以生成isd_config.ini */
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/* 其他不相关的配置请勿添加在改文件 */
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#ifdef CONFIG_BOARD_JL701N_DEMO
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/* Following Macros Affect Periods Of Both Code Compiling And Post-build */
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#define CONFIG_DOUBLE_BANK_ENABLE 1 //单双备份选择(若打开了改宏,FLASH结构变为双备份结构，适用于接入第三方协议的OTA， PS: JL-OTA同样支持双备份升级, 需要根据实际FLASH大小同时配置CONFIG_FLASH_SIZE)
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#define CONFIG_APP_OTA_ENABLE 1 //是否支持RCSP升级(JL-OTA)
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#define CONFIG_UPDATE_JUMP_TO_MASK 0 //配置升级到loader的方式0为直接reset,1为跳转(适用于芯片电源由IO口KEEP住的方案,需要注意检查跳转前是否将使用DMA的硬件模块全部关闭)
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#define CONFIG_IO_KEY_EN 1 //配置是否使用IO按键，配合RESET1
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#define CONFIG_UPDATE_WITH_MD5_CHECK_EN 0 //配置升级是否支持MD5校验
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#define CONFIG_ANC_ENABLE 0 //配置是否支持ANC
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//flash size vaule definition
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#define FLASH_SIZE_256K 0x40000
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#define FLASH_SIZE_512K 0x80000
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#define FLASH_SIZE_1M 0x100000
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#define FLASH_SIZE_2M 0x200000
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#define FLASH_SIZE_4M 0x400000
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#define CONFIG_FLASH_SIZE FLASH_SIZE_1M //配置FLASH大小
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/* Above Macros Affect Periods Of Both Code Compiling And Post-build */
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/* Following Macros Only For Post Bulid Configuaration */
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#define CONFIG_DB_UPDATE_DATA_GENERATE_EN 1 //是否生成db_data.bin(用于第三方协议接入使用)
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#define CONFIG_ONLY_GRENERATE_ALIGN_4K_CODE 1 //ufw只生成1份4K对齐的代码
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//config for supported chip version
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#ifdef CONFIG_BR30_C_VERSION
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#define CONFIG_SUPPORTED_CHIP_VERSION C
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#else
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#define CONFIG_SUPPORTED_CHIP_VERSION B,D,E,M,N,O,P
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#endif
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//DON'T MODIFY THIS CONFIG EXCEPT SDK PUBLISHER
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#define CONFIG_CHIP_NAME AC701N //除了SDK发布者,请不要修改
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//it can be modified before first programming,but keep the same as the original version
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#define CONFIG_PID AC701N //烧写或强制升级之前可以修改,之后升级要保持一致
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//it can be modified before first programming,but keep the same as the original version
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#define CONFIG_VID 0.01 //烧写或强制升级之前可以修改,之后升级要保持一致
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//Project with bluetooth,it must use OSC as PLL_SOURCE;
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#define CONFIG_PLL_SOURCE_USING_LRC 0 //PLL时钟源选择 1:LRC 2:OSC
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//config alignment size unit
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#ifdef CONFIG_256K_FLASH
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#define ALIGN_UNIT_256B 1 //FLASH对齐方式选择，如果是256K的FLASH，选择256BYTE对齐方式
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#else
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#define ALIGN_UNIT_256B 0
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#endif
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//partial platform check this config to select the uart IO for wired update
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#define CONFIG_UART_UPDATE_PIN -1
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//isd_download loader/uboot/update_loader debug io config
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//#define CONFIG_UBOOT_DEBUG_PIN PA05
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//#define CONFIG_UBOOT_DEBUG_BAUD_RATE 1000000
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//config long-press reset io pin,time,trigger level
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#define CONFIG_RESET_PIN LDO //io pin
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#define CONFIG_RESET_TIME 00 //unit:second
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#define CONFIG_RESET_LEVEL 0 //tigger level(0/1)
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#if CONFIG_IO_KEY_EN
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#define CONFIG_SUPPORT_RESET1
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#define CONFIG_RESET1_PIN PB01 //io pin
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#define CONFIG_RESET1_TIME 16 //unit:second
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#define CONFIG_RESET1_LEVEL 0 //tigger level(0/1)
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#endif
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//reserved three custom cfg item for the future definition
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//#define CONFIG_CUSTOM_CFG1_TYPE POWER_PIN
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//#define CONFIG_CUSTOM_CFG1_VALUE PC01_1
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//#define CONFIG_CUSTOM_CFG2_TYPE
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//#define CONFIG_CUSTOM_CFG2_VALUE
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//#define CONFIG_CUSTOM_CFG3_TYPE
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//#define CONFIG_CUSTOM_CFG3_VALUE
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#define CONFIG_VDDIO_LVD_LEVEL 3 ////VDDIO_LVD挡位，0: 1.9V 1: 2.0V 2: 2.1V 3: 2.2V 4: 2.3V 5: 2.4V 6: 2.5V 7: 2.6V
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//with single-bank mode,actual vm size should larger this VM_LEAST_SIZE,and dual bank mode,actual vm size equals this;
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#define CONFIG_VM_LEAST_SIZE 8K
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//config whether erased this area when do a update,1-No Operation,0-Erase
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#define CONFIG_VM_OPT 1
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//config whether erased this area when do a update,1-No Operation,0-Erase
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#define CONFIG_BTIF_OPT 1
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//reserved two custom cfg area for the future definition
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//#define CONFIG_RESERVED_AREA1 EXIF1
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#ifdef CONFIG_RESERVED_AREA1
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#define CONFIG_RESERVED_AREA1_ADDR AUTO
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#define CONFIG_RESERVED_AREA1_LEN 0x1000
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#define CONFIG_RESERVED_AREA1_OPT 1
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//#define CONFIG_RESERVED_AREA1_FILE anc_gains.bin
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#endif
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//#define CONFIG_RESERVED_AREA2 EXIF2
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#ifdef CONFIG_RESERVED_AREA2
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#define CONFIG_RESERVED_AREA2_ADDR AUTO
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#define CONFIG_RESERVED_AREA2_LEN 0x1000
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#define CONFIG_RESERVED_AREA2_OPT 1
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//#define CONFIG_RESERVED_AREA2_FILE anc_gains.bin
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#endif
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/* Above Macros Only For Post Bulid Configuaration */
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#endif /* #ifdef CONFIG_BOARD_JL701N_DEMO */
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#endif /* #ifndef CONFIG_BOARD_JL701N_DEMO_POST_BUILD_CFG_H */
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