添加普冉 PY32F040 OTA 双工程代码生成模板
Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
@@ -0,0 +1,29 @@
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#ifndef __FLASH_H
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#define __FLASH_H
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#include "boot_main.h"
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#include "ota_config.h"
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/* ════════════════════════════════════════════════════════════════
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* Flash 布局与 OTA 状态机 — 统一由 ota_config.h 配置(唯一入口)
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* (布局宏 OTA_RUN_ADDR_BASE / OTA_BAK_ADDR_BASE / OTA_SLOT_MAX_SIZE
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* 及状态结构 ota_param_t / OTA_STATE_* 均在 ota_config.h 中定义)
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* ════════════════════════════════════════════════════════════════ */
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#define SYS_BOOTLOADER_ADDR_BASE 0x08000000UL /* Bootloader,17KB */
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#define FLASH_END_ADDR 0x08020000UL /* 128KB 边界 */
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#define RAM_BASE_ADDR 0x20000000UL
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#define RAM_END_ADDR 0x20004000UL /* 16KB RAM */
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/* ════════════════════════════════════════════════════════════════
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* Flash 操作 API
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* ════════════════════════════════════════════════════════════════ */
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void APP_FlashWrite(uint32_t PageAddress, uint8_t *Data, uint32_t DataSize);
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void APP_FlashRead(uint32_t PageAddress, uint8_t *Data, uint32_t DataSize);
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void APP_FlashEraseWithCheck(uint32_t PageAddress, uint32_t DataSize);
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/* OTA 状态区读写(AB:4 页轮换磨损均衡;SINGLE:固定页 0 直写) */
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void ota_param_load(ota_param_t *p);
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void ota_param_store(const ota_param_t *p);
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#endif
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@@ -0,0 +1,90 @@
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/**
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******************************************************************************
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* @file main.h
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* @author MCU Application Team
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* @brief Header for main.c file.
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* This file contains the common defines of the application.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2023 Puya Semiconductor Co.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by Puya under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __BOOT_MAIN_H
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#define __BOOT_MAIN_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "py32f0xx_hal.h"
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#include "py32f040xx_Start_Kit.h"
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#include "log.h"
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#include <stdbool.h>
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#include <stdint.h>
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#include <string.h>
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/* Private includes ----------------------------------------------------------*/
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/* Private defines -----------------------------------------------------------*/
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typedef int32_t s32;
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typedef int16_t s16;
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typedef int8_t s8;
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typedef const int32_t sc32; /*!< Read Only */
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typedef const int16_t sc16; /*!< Read Only */
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typedef const int8_t sc8; /*!< Read Only */
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typedef __IO int32_t vs32;
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typedef __IO int16_t vs16;
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typedef __IO int8_t vs8;
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typedef __I int32_t vsc32; /*!< Read Only */
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typedef __I int16_t vsc16; /*!< Read Only */
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typedef __I int8_t vsc8; /*!< Read Only */
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typedef uint32_t u32;
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typedef uint16_t u16;
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typedef uint8_t u8;
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typedef const uint32_t uc32; /*!< Read Only */
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typedef const uint16_t uc16; /*!< Read Only */
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typedef const uint8_t uc8; /*!< Read Only */
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typedef __IO uint32_t vu32;
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typedef __IO uint16_t vu16;
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typedef __IO uint8_t vu8;
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typedef __I uint32_t vuc32; /*!< Read Only */
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typedef __I uint16_t vuc16; /*!< Read Only */
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typedef __I uint8_t vuc8; /*!< Read Only */
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/* Exported variables prototypes ---------------------------------------------*/
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/* Exported functions prototypes ---------------------------------------------*/
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void Error_Handler(uint8_t *file, uint32_t line);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __BOOT_MAIN_H */
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/************************ (C) COPYRIGHT Puya *****END OF FILE******************/
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@@ -0,0 +1,281 @@
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/**
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******************************************************************************
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* @file py32f040_hal_conf.h
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* @author MCU Application Team
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* @brief HAL configuration file.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2023 Puya Semiconductor Co.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by Puya under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __PY32F040_HAL_CONF_H
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#define __PY32F040_HAL_CONF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/* ########################## Module Selection ############################## */
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/**
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* @brief This is the list of modules to be used in the HAL driver
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*/
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#define HAL_MODULE_ENABLED
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#define HAL_RCC_MODULE_ENABLED
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/* #define HAL_ADC_MODULE_ENABLED */
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/* #define HAL_CRC_MODULE_ENABLED */
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/* #define HAL_COMP_MODULE_ENABLED */
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#define HAL_FLASH_MODULE_ENABLED
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#define HAL_GPIO_MODULE_ENABLED
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/* #define HAL_IWDG_MODULE_ENABLED */
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/* #define HAL_WWDG_MODULE_ENABLED */
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/* #define HAL_TIM_MODULE_ENABLED */
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#define HAL_DMA_MODULE_ENABLED
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/* #define HAL_LPTIM_MODULE_ENABLED */
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#define HAL_PWR_MODULE_ENABLED
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/* #define HAL_I2C_MODULE_ENABLED */
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#define HAL_UART_MODULE_ENABLED
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/* #define HAL_USART_MODULE_ENABLED */
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/* #define HAL_SPI_MODULE_ENABLED */
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/* #define HAL_RTC_MODULE_ENABLED */
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/* #define HAL_LCD_MODULE_ENABLED */
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/* #define HAL_EXTI_MODULE_ENABLED */
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#define HAL_CORTEX_MODULE_ENABLED
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/* #define HAL_CTC_MODULE_ENABLED */
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/* #define HAL_OPA_MODULE_ENABLED */
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/* #define HAL_DIV_MODULE_ENABLED */
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/* #define HAL_I2S_MODULE_ENABLED */
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/* #define HAL_IRDA_MODULE_ENABLED */
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/* #define HAL_SMARTCARD_MODULE_ENABLED */
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/* ########################## Oscillator Values adaptation ####################*/
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#if !defined (HSI_VALUE)
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#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz */
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#endif /* HSI_VALUE */
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/**
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* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
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* This value is used by the RCC HAL module to compute the system frequency
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*/
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#if !defined (HSE_VALUE)
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#define HSE_VALUE ((uint32_t)24000000) /*!< Value of the External oscillator in Hz */
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#endif /* HSE_VALUE */
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#if !defined (HSE_STARTUP_TIMEOUT)
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#define HSE_STARTUP_TIMEOUT ((uint32_t)200) /*!< Time out for HSE start up, in ms */
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#endif /* HSE_STARTUP_TIMEOUT */
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/**
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* @brief Internal Low Speed Internal oscillator (LSI) value.
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*/
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#if !defined (LSI_VALUE)
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#define LSI_VALUE ((uint32_t)32768) /*!< LSI Typical Value in Hz */
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#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
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The real value may vary depending on the variations
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in voltage and temperature. */
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/**
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* @brief Adjust the value of External Low Speed oscillator (LSE) used in your application.
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* This value is used by the RCC HAL module to compute the system frequency
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*/
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#if !defined (LSE_VALUE)
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#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
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#endif /* LSE_VALUE */
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#if !defined (LSE_STARTUP_TIMEOUT)
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#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
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#endif /* LSE_STARTUP_TIMEOUT */
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/* Tip: To avoid modifying this file each time you need to use different HSE,
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=== you can define the HSE value in your toolchain compiler preprocessor. */
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/* ########################### System Configuration ######################### */
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/**
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* @brief This is the HAL system configuration section
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*/
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#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
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#define PRIORITY_HIGHEST 0
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#define PRIORITY_HIGH 1
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#define PRIORITY_LOW 2
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#define PRIORITY_LOWEST 3
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#define TICK_INT_PRIORITY ((uint32_t)PRIORITY_LOWEST) /*!< tick interrupt priority (lowest by default) */
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#define USE_RTOS 0
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#define PREFETCH_ENABLE 0
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/* ########################## Assert Selection ############################## */
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/**
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* @brief Uncomment the line below to expanse the "assert_param" macro in the
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* HAL drivers code
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*/
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/* #define USE_FULL_ASSERT 1U */
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/* ################## SPI peripheral configuration ########################## */
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/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
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* Activated: CRC code is present inside driver
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* Deactivated: CRC code cleaned from driver
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*/
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#define USE_SPI_CRC 0U
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/* Includes ------------------------------------------------------------------*/
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/**
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* @brief Include module's header file
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*/
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#ifdef HAL_MODULE_ENABLED
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#include "py32f0xx_hal.h"
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#endif /* HAL_MODULE_ENABLED */
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#ifdef HAL_RCC_MODULE_ENABLED
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#include "py32f040_hal_rcc.h"
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#endif /* HAL_RCC_MODULE_ENABLED */
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#ifdef HAL_EXTI_MODULE_ENABLED
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#include "py32f040_hal_exti.h"
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#endif /* HAL_EXTI_MODULE_ENABLED */
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#ifdef HAL_GPIO_MODULE_ENABLED
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#include "py32f040_hal_gpio.h"
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#endif /* HAL_GPIO_MODULE_ENABLED */
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#ifdef HAL_CORTEX_MODULE_ENABLED
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#include "py32f040_hal_cortex.h"
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#endif /* HAL_CORTEX_MODULE_ENABLED */
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#ifdef HAL_DMA_MODULE_ENABLED
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#include "py32f040_hal_dma.h"
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#endif /* HAL_DMA_MODULE_ENABLED */
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#ifdef HAL_ADC_MODULE_ENABLED
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#include "py32f040_hal_adc.h"
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#endif /* HAL_ADC_MODULE_ENABLED */
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#ifdef HAL_CRC_MODULE_ENABLED
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#include "py32f040_hal_crc.h"
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#endif /* HAL_CRC_MODULE_ENABLED */
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#ifdef HAL_COMP_MODULE_ENABLED
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#include "py32f040_hal_comp.h"
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#endif /* HAL_COMP_MODULE_ENABLED */
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#ifdef HAL_FLASH_MODULE_ENABLED
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#include "py32f040_hal_flash.h"
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#endif /* HAL_FLASH_MODULE_ENABLED */
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#ifdef HAL_I2C_MODULE_ENABLED
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#include "py32f040_hal_i2c.h"
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#endif /* HAL_I2C_MODULE_ENABLED */
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#ifdef HAL_IWDG_MODULE_ENABLED
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#include "py32f040_hal_iwdg.h"
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#endif /* HAL_IWDG_MODULE_ENABLED */
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#ifdef HAL_PWR_MODULE_ENABLED
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#include "py32f040_hal_pwr.h"
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#endif /* HAL_PWR_MODULE_ENABLED */
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#ifdef HAL_RTC_MODULE_ENABLED
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#include "py32f040_hal_rtc.h"
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#endif /* HAL_RTC_MODULE_ENABLED */
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#ifdef HAL_SPI_MODULE_ENABLED
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#include "py32f040_hal_spi.h"
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#endif /* HAL_SPI_MODULE_ENABLED */
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#ifdef HAL_TIM_MODULE_ENABLED
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#include "py32f040_hal_tim.h"
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#endif /* HAL_TIM_MODULE_ENABLED */
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#ifdef HAL_LPTIM_MODULE_ENABLED
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#include "py32f040_hal_lptim.h"
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#endif /* HAL_LPTIM_MODULE_ENABLED */
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#ifdef HAL_UART_MODULE_ENABLED
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#include "py32f040_hal_uart.h"
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#endif /* HAL_UART_MODULE_ENABLED */
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#ifdef HAL_WWDG_MODULE_ENABLED
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#include "py32f040_hal_wwdg.h"
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#endif /* HAL_WWDG_MODULE_ENABLED */
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#ifdef HAL_LCD_MODULE_ENABLED
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#include "py32f040_hal_lcd.h"
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#endif /* HAL_LCD_MODULE_ENABLED */
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#ifdef HAL_USART_MODULE_ENABLED
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#include "py32f040_hal_usart.h"
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#endif /* HAL_USART_MODULE_ENABLED */
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#ifdef HAL_CTC_MODULE_ENABLED
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#include "py32f040_hal_ctc.h"
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#endif /* HAL_CTC_MODULE_ENABLED */
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#ifdef HAL_OPA_MODULE_ENABLED
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#include "py32f040_hal_opa.h"
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#endif /* HAL_OPA_MODULE_ENABLED */
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#ifdef HAL_DIV_MODULE_ENABLED
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#include "py32f040_hal_div.h"
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#endif /* HAL_DIV_MODULE_ENABLED */
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#ifdef HAL_I2S_MODULE_ENABLED
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#include "py32f040_hal_i2s.h"
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#endif /* HAL_I2S_MODULE_ENABLED */
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#ifdef HAL_SMARTCARD_MODULE_ENABLED
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#include "py32f040_hal_smartcard.h"
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#endif /* HAL_SMARTCARD_MODULE_ENABLED */
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#ifdef HAL_IRDA_MODULE_ENABLED
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#include "py32f040_hal_irda.h"
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#endif /* HAL_IRDA_MODULE_ENABLED */
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/* Exported macro ------------------------------------------------------------*/
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#ifdef USE_FULL_ASSERT
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/**
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* @brief The assert_param macro is used for function's parameters check.
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* @param expr: If expr is false, it calls assert_failed function
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* which reports the name of the source file and the source
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* line number of the call that failed.
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* If expr is true, it returns no value.
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* @retval None
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*/
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#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
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/* Exported functions ------------------------------------------------------- */
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void assert_failed(uint8_t* file, uint32_t line);
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#else
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#define assert_param(expr) ((void)0U)
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#endif /* USE_FULL_ASSERT */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PY32F040_HAL_CONF_H */
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/************************ (C) COPYRIGHT Puya *****END OF FILE******************/
|
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@@ -0,0 +1,56 @@
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/**
|
||||
******************************************************************************
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||||
* @file py32f040_it.h
|
||||
* @author MCU Application Team
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2023 Puya Semiconductor Co.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by Puya under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __PY32F040_IT_H
|
||||
#define __PY32F040_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __PY32F040_IT_H */
|
||||
|
||||
/************************ (C) COPYRIGHT Puya *****END OF FILE******************/
|
||||
@@ -0,0 +1,526 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>Project</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARM_Compiler_5.06u7</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>PY32F040xB</Device>
|
||||
<Vendor>Puya</Vendor>
|
||||
<PackID>Puya.PY32F0xx_DFP.1.2.0</PackID>
|
||||
<PackURL>https://www.puyasemi.com/uploadfiles/</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x00004000) IROM(0x08000000,0x00020000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0PY32F040xx_128 -FS08000000 -FL020000 -FP0($$Device:PY32F040xB$CMSIS\Flash\PY32F040xx_128.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:PY32F040xB$Drivers\CMSIS\Device\Puya\PY32F0xx\Include\py32f0xx.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:PY32F040xB$CMSIS\SVD\PY32F040xx.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\Output\</OutputDirectory>
|
||||
<OutputName>Project</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\Output\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> -REMAP </SimDllArguments>
|
||||
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM0+</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> </TargetDllArguments>
|
||||
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM0+</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M0+"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<RvdsCdeCp>0</RvdsCdeCp>
|
||||
<nBranchProt>0</nBranchProt>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x4000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
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|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x4000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>USE_HAL_DRIVER,PY32F040xB</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\Inc;..\..\Shared;..\..\Drivers\BSP\PY32F040xx_Start_Kit;..\..\Drivers\CMSIS\Include;..\..\Drivers\CMSIS\Device\PY32F040\Include;..\..\Drivers\PY32F040_HAL_Driver\Inc;..\Code;..\..\Shared</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<ClangAsOpt>4</ClangAsOpt>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Common</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup_py32f040xx.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\startup_py32f040xx.s</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>system_py32f040.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Src\system_py32f040.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>User</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>py32f040_hal_msp.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Src\py32f040_hal_msp.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_it.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Src\py32f040_it.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>boot_main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Src\boot_main.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Core</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>flash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Shared\flash.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>crc32.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Shared\crc32.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>PY32F040xx_Start_Kit</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>py32f040xx_Start_Kit.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\BSP\PY32F040xx_Start_Kit\py32f040xx_Start_Kit.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>PY32F040_HAL_Driver</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>py32f040_hal_flash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_flash.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_rcc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_rcc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_pwr.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_pwr.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_rcc_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_rcc_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_cortex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_cortex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_uart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_dma.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_dma.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Doc</GroupName>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="Project"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
<LayerInfo>
|
||||
<Layers>
|
||||
<Layer>
|
||||
<LayName>Bootloder</LayName>
|
||||
<LayPrjMark>1</LayPrjMark>
|
||||
</Layer>
|
||||
</Layers>
|
||||
</LayerInfo>
|
||||
|
||||
</Project>
|
||||
@@ -0,0 +1,30 @@
|
||||
// File: PY32F040xx.dbgconf
|
||||
// Version: 1.0.0
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <h> Debug MCU configuration register (DBGMCU_CR)
|
||||
// <o.1> DBG_STOP <i> Debug stop mode
|
||||
// </h>
|
||||
DbgMCU_CR = 0x00000002;
|
||||
|
||||
// <h> Debug MCU APB freeze1 register (DBG_APB_FZ1)
|
||||
// <i> Reserved bits must be kept at reset value
|
||||
// <o.31> DBG_LPTIM_STOP <i> LPTIM stopped when core is halted
|
||||
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
|
||||
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
|
||||
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
|
||||
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
|
||||
// </h>
|
||||
DbgMCU_APB_Fz1 = 0x00000000;
|
||||
|
||||
// <h> Debug MCU APB freeze2 register (DBG_APB_FZ2)
|
||||
// <i> Reserved bits must be kept at reset value
|
||||
// <o.18> DBG_TIM17_STOP <i> TIM17 counter stopped when core is halted
|
||||
// <o.17> DBG_TIM16_STOP <i> TIM16 counter stopped when core is halted
|
||||
// <o.15> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
|
||||
// <o.11> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
|
||||
// </h>
|
||||
DbgMCU_APB_Fz2 = 0x00000000;
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
@@ -0,0 +1,21 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'Bootloader'
|
||||
* Target: 'Project'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "py32f0xx.h"
|
||||
|
||||
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
@@ -0,0 +1,262 @@
|
||||
;******************************************************************************
|
||||
;* @file startup_py32f040xx.s
|
||||
;* @author MCU Application Team
|
||||
;* @brief PY32F040xx devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM0+ processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;******************************************************************************
|
||||
;* @attention
|
||||
;*
|
||||
;* <h2><center>© Copyright (c) 2023 Puya Semiconductor Co.
|
||||
;* All rights reserved.</center></h2>
|
||||
;*
|
||||
;* This software component is licensed by Puya under BSD 3-Clause license,
|
||||
;* the "License"; You may not use this file except in compliance with the
|
||||
;* License. You may obtain a copy of the License at:
|
||||
;* opensource.org/licenses/BSD-3-Clause
|
||||
;*
|
||||
;******************************************************************************
|
||||
;* @attention
|
||||
;*
|
||||
;* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
;* All rights reserved.</center></h2>
|
||||
;*
|
||||
;* This software component is licensed by ST under BSD 3-Clause license,
|
||||
;* the "License"; You may not use this file except in compliance with the
|
||||
;* License. You may obtain a copy of the License at:
|
||||
;* opensource.org/licenses/BSD-3-Clause
|
||||
;*
|
||||
;******************************************************************************
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; 0Window Watchdog
|
||||
DCD PVD_IRQHandler ; 1PVD through EXTI Line detect
|
||||
DCD RTC_IRQHandler ; 2RTC through EXTI Line
|
||||
DCD FLASH_IRQHandler ; 3FLASH
|
||||
DCD RCC_IRQHandler ; 4RCC
|
||||
DCD EXTI0_1_IRQHandler ; 5EXTI Line 0 and 1
|
||||
DCD EXTI2_3_IRQHandler ; 6EXTI Line 2 and 3
|
||||
DCD EXTI4_15_IRQHandler ; 7EXTI Line 4 to 15
|
||||
DCD LCD_IRQHandler ; 8LCD
|
||||
DCD DMA1_Channel1_IRQHandler ; 9DMA1 Channel 1
|
||||
DCD DMA1_Channel2_3_IRQHandler ; 10DMA1 Channel 2 and Channel 3
|
||||
DCD DMA1_Channel4_5_6_7_IRQHandler ; 11DMA1 Channel 4, Channel 5, Channel 6, Channel 7
|
||||
DCD ADC_COMP_IRQHandler ; 12ADC&COMP
|
||||
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; 13TIM1 Break, Update, Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; 14TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; 15TIM2
|
||||
DCD TIM3_IRQHandler ; 16TIM3
|
||||
DCD TIM6_LPTIM1_IRQHandler ; 17TIM6&LPTIM1
|
||||
DCD TIM7_IRQHandler ; 18TIM7
|
||||
DCD TIM14_IRQHandler ; 19TIM14
|
||||
DCD TIM15_IRQHandler ; 20TIM15
|
||||
DCD TIM16_IRQHandler ; 21TIM16
|
||||
DCD TIM17_IRQHandler ; 22TIM17
|
||||
DCD I2C1_IRQHandler ; 23I2C1
|
||||
DCD I2C2_IRQHandler ; 24I2C2
|
||||
DCD SPI1_IRQHandler ; 25SPI1
|
||||
DCD SPI2_IRQHandler ; 26SPI2
|
||||
DCD USART1_IRQHandler ; 27USART1
|
||||
DCD USART2_IRQHandler ; 28USART2
|
||||
DCD USART3_4_IRQHandler ; 29USART3&USART4
|
||||
DCD 0 ; 30Reserved
|
||||
DCD 0 ; 31Reserved
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_15_IRQHandler [WEAK]
|
||||
EXPORT LCD_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
|
||||
EXPORT ADC_COMP_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT TIM14_IRQHandler [WEAK]
|
||||
EXPORT TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM17_IRQHandler [WEAK]
|
||||
EXPORT I2C1_IRQHandler [WEAK]
|
||||
EXPORT I2C2_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_4_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
RTC_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_1_IRQHandler
|
||||
EXTI2_3_IRQHandler
|
||||
EXTI4_15_IRQHandler
|
||||
LCD_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_3_IRQHandler
|
||||
DMA1_Channel4_5_6_7_IRQHandler
|
||||
ADC_COMP_IRQHandler
|
||||
TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM6_LPTIM1_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
TIM14_IRQHandler
|
||||
TIM15_IRQHandler
|
||||
TIM16_IRQHandler
|
||||
TIM17_IRQHandler
|
||||
I2C1_IRQHandler
|
||||
I2C2_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_4_IRQHandler
|
||||
B .
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT Puya *****END OF FILE*******************
|
||||
@@ -0,0 +1,504 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file boot_main.c
|
||||
* @brief 可配置 OTA Bootloader — PY32F040
|
||||
*
|
||||
* 三种模式(由 ota_config.h 的 OTA_BACKUP_MODE / OTA_SWAP_STRATEGY 决定):
|
||||
*
|
||||
* ① 单备份(SINGLE):
|
||||
* PENDING → 校验 BAK → 拷贝覆盖主区 → 跳转主区(无回滚)
|
||||
* 掉电:PENDING 不清除,下次启动重新校验+拷贝(BAK 完好,天然安全)
|
||||
*
|
||||
* ② 双备份 + RAM 缓冲交换(AB + RAM):
|
||||
* PENDING → 校验 B 区 → 逐页交换(RAM 双页缓冲)→ BOOT_NEW → 跳转 A 区
|
||||
* SWAPPING → 交换掉电中断,续做(phase/progress 恢复)
|
||||
* BOOT_NEW 未确认(崩溃/IWDG 复位)→ 反向交换回滚 → 跳转 A 区
|
||||
*
|
||||
* ③ 双备份 + Flash 暂存区交换(AB + SCRATCH):
|
||||
* 同上,但交换用 scratch 暂存一页(Flash 持久),掉电恢复可完整保留两页,
|
||||
* 回滚永远可用;升级耗时更短。
|
||||
*
|
||||
* 跳转新固件前使能 IWDG:新固件崩溃则看门狗复位,Bootloader 再次判定并回滚。
|
||||
* 交换/拷贝期间使能 IWDG 并逐页喂狗(单页耗时 < 100ms,远小于 1s 超时)。
|
||||
******************************************************************************
|
||||
*/
|
||||
#include "boot_main.h"
|
||||
#include "flash.h"
|
||||
#include "crc32.h"
|
||||
#include "iwdg_config.h"
|
||||
|
||||
#define DEBUG
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
static ota_param_t g_ota;
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
static int fw_vector_ok(uint32_t base);
|
||||
static int fw_validate(uint32_t base, uint32_t size, uint32_t crc);
|
||||
static void boot_iwdg_enable(void);
|
||||
static void boot_iwdg_feed(void);
|
||||
static void boot_jump(uint32_t base);
|
||||
|
||||
#if (OTA_BACKUP_MODE == OTA_MODE_SINGLE)
|
||||
static void copy_bak_to_run(void);
|
||||
#else
|
||||
static void swap_execute(int reverse);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief 系统复位
|
||||
*/
|
||||
void mcuRestart(void)
|
||||
{
|
||||
Log("[OTA] Restarting MCU...\r\n");
|
||||
HAL_NVIC_SystemReset();
|
||||
}
|
||||
|
||||
/* ── OTA 状态区读写 ─────────────────────────────────────────────────────────
|
||||
* 由 flash.h 的 ota_param_load / ota_param_store 提供(4 页轮换磨损均衡)。
|
||||
* 状态区无效时 load 自动回退默认 IDLE。 */
|
||||
|
||||
/* ── 固件校验 ─────────────────────────────────────────────────────────────── */
|
||||
|
||||
/* 向量表合法性:栈顶在 RAM,复位向量落在运行区 Flash 范围内。
|
||||
* 注意:固件始终链接运行区 OTA_RUN_ADDR_BASE,BAK/B 区只是下载/备份缓冲,
|
||||
* 存储位置 ≠ 链接地址。无论 base 传 RUN 还是 BAK,都应校验复位向量是否指向
|
||||
* 运行区(固件真正执行处),否则 BAK 校验会因复位向量指向 RUN 而被误判非法。 */
|
||||
static int fw_vector_ok(uint32_t base)
|
||||
{
|
||||
uint32_t sp = *(volatile uint32_t *)base;
|
||||
uint32_t rv = *(volatile uint32_t *)(base + 4);
|
||||
|
||||
(void)base;
|
||||
|
||||
if ((sp < RAM_BASE_ADDR) || (sp >= RAM_END_ADDR))
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
if ((rv < OTA_RUN_ADDR_BASE) || (rv >= (OTA_RUN_ADDR_BASE + OTA_SLOT_MAX_SIZE)))
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* 完整校验:向量表合法 + CRC32 匹配 */
|
||||
static int fw_validate(uint32_t base, uint32_t size, uint32_t crc)
|
||||
{
|
||||
if ((size == 0) || (size > OTA_SLOT_MAX_SIZE))
|
||||
{
|
||||
Log("[BL] fw size invalid: %lu\r\n", (unsigned long)size);
|
||||
return 0;
|
||||
}
|
||||
if (!fw_vector_ok(base))
|
||||
{
|
||||
Log("[BL] fw vector invalid @ %08X\r\n", (unsigned int)base);
|
||||
return 0;
|
||||
}
|
||||
if (crc32_compute((uint8_t *)base, size) != crc)
|
||||
{
|
||||
Log("[BL] fw CRC32 mismatch @ %08X\r\n", (unsigned int)base);
|
||||
return 0;
|
||||
}
|
||||
Log("[BL] fw validate OK @ %08X (size %lu)\r\n", (unsigned int)base, (unsigned long)size);
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* ── IWDG:跳转前使能,新固件崩溃则由看门狗复位回滚;交换/拷贝期间逐页喂狗 ── */
|
||||
|
||||
static void boot_iwdg_enable(void)
|
||||
{
|
||||
/* 使能 LSI 并等待就绪 */
|
||||
SET_BIT(RCC->CSR, RCC_CSR_LSION);
|
||||
for (uint32_t i = 0; i < 10000; i++)
|
||||
{
|
||||
if (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY))
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* IWDG 配置:参数见 Shared/iwdg_config.h */
|
||||
IWDG->KR = 0x5555; /* 解锁 */
|
||||
IWDG->PR = IWDG_PR_REG; /* /16 */
|
||||
IWDG->RLR = IWDG_RELOAD_VALUE;
|
||||
IWDG->KR = 0xAAAA; /* 重装 */
|
||||
IWDG->KR = 0xCCCC; /* 启动 */
|
||||
Log("[BL] IWDG enabled (~1s)\r\n");
|
||||
}
|
||||
|
||||
static void boot_iwdg_feed(void)
|
||||
{
|
||||
IWDG->KR = 0xAAAA; /* 重装计数,防交换/拷贝期间复位 */
|
||||
}
|
||||
|
||||
/* ── 跳转到 APP ───────────────────────────────────────────────────────────── */
|
||||
|
||||
typedef void (*iapfun)(void);
|
||||
|
||||
__asm void MSR_MSP(uint32_t addr)
|
||||
{
|
||||
MSR MSP, r0
|
||||
BX r14
|
||||
}
|
||||
|
||||
static void boot_jump(uint32_t base)
|
||||
{
|
||||
uint32_t sp, rv;
|
||||
|
||||
if (!fw_vector_ok(base))
|
||||
{
|
||||
Log("[BL] Jump target vector invalid! Hang.\r\n");
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
sp = *(volatile uint32_t *)base;
|
||||
rv = *(volatile uint32_t *)(base + 4);
|
||||
|
||||
Log("[BL] Jump to APP @ %08X\r\n", (unsigned int)base);
|
||||
|
||||
/* 关闭全局中断,设置向量表与栈,跳转 */
|
||||
__disable_irq();
|
||||
SCB->VTOR = base; /* PY32F040 支持 VTOR */
|
||||
MSR_MSP(sp);
|
||||
((iapfun)rv)();
|
||||
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/* ── 单备份:BAK 拷贝覆盖主区 ─────────────────────────────────────────────── */
|
||||
|
||||
#if (OTA_BACKUP_MODE == OTA_MODE_SINGLE)
|
||||
static void copy_bak_to_run(void)
|
||||
{
|
||||
uint8_t buf[OTA_PAGE_SIZE];
|
||||
uint32_t i, pages = OTA_SLOT_PAGE_NB;
|
||||
|
||||
Log("[BL] copy BAK(%08X) -> RUN(%08X), %lu pages\r\n",
|
||||
(unsigned int)OTA_BAK_ADDR_BASE, (unsigned int)OTA_RUN_ADDR_BASE,
|
||||
(unsigned long)pages);
|
||||
|
||||
for (i = 0; i < pages; i++)
|
||||
{
|
||||
uint32_t src = OTA_BAK_ADDR_BASE + i * OTA_PAGE_SIZE;
|
||||
uint32_t dst = OTA_RUN_ADDR_BASE + i * OTA_PAGE_SIZE;
|
||||
APP_FlashRead(src, buf, OTA_PAGE_SIZE);
|
||||
APP_FlashEraseWithCheck(dst, OTA_PAGE_SIZE);
|
||||
APP_FlashWrite(dst, buf, OTA_PAGE_SIZE);
|
||||
boot_iwdg_feed();
|
||||
}
|
||||
|
||||
/* 拷贝完成:置 BOOT_NEW(等待 App 确认并回复 OTA 完成;单备份无回滚目标,
|
||||
* 若 App 未确认崩溃,下次启动见 BOOT_NEW 直接继续运行)。
|
||||
* 中途掉电则下次重新拷贝(PENDING 未清,BAK 完好) */
|
||||
g_ota.state = OTA_STATE_BOOT_NEW;
|
||||
ota_param_store(&g_ota);
|
||||
Log("[BL] copy done\r\n");
|
||||
}
|
||||
#endif /* SINGLE */
|
||||
|
||||
/* ── 双备份:A/B 区交换 ───────────────────────────────────────────────────── */
|
||||
|
||||
#if (OTA_BACKUP_MODE == OTA_MODE_AB)
|
||||
|
||||
#if (OTA_SWAP_STRATEGY == OTA_SWAP_SCRATCH)
|
||||
/**
|
||||
* @brief Flash 暂存区交换(scratch 持久保存一页,掉电可完整恢复)
|
||||
* @param reverse 0=正向(A=旧,B=新 → A=新,B=旧,部署新固件)
|
||||
* 1=反向(A=新,B=旧 → A=旧,B=新,回滚旧固件)
|
||||
*/
|
||||
static void swap_execute(int reverse)
|
||||
{
|
||||
uint32_t a = OTA_RUN_ADDR_BASE;
|
||||
uint32_t b = OTA_BAK_ADDR_BASE;
|
||||
uint32_t i, total_pages = OTA_SLOT_PAGE_NB;
|
||||
uint8_t buf[OTA_PAGE_SIZE];
|
||||
|
||||
if (g_ota.state != OTA_STATE_SWAPPING)
|
||||
{
|
||||
g_ota.state = OTA_STATE_SWAPPING;
|
||||
g_ota.progress = 0;
|
||||
g_ota.phase = 0;
|
||||
ota_param_store(&g_ota);
|
||||
}
|
||||
Log("[BL] swap(%s) %lu pages\r\n", reverse ? "rollback" : "forward",
|
||||
(unsigned long)total_pages);
|
||||
|
||||
for (i = g_ota.progress; i < total_pages; i++)
|
||||
{
|
||||
uint32_t addr_a = a + i * OTA_PAGE_SIZE;
|
||||
uint32_t addr_b = b + i * OTA_PAGE_SIZE;
|
||||
|
||||
/* 掉电恢复:phase==1 时 scratch 保存着 addr_a 的原内容,
|
||||
* 直接补写 addr_b 完成本页,再继续(scratch 持久,不丢) */
|
||||
if ((g_ota.phase == 1) && (i == g_ota.progress))
|
||||
{
|
||||
APP_FlashRead(OTA_SCRATCH_ADDR, buf, OTA_PAGE_SIZE);
|
||||
APP_FlashEraseWithCheck(addr_b, OTA_PAGE_SIZE);
|
||||
APP_FlashWrite(addr_b, buf, OTA_PAGE_SIZE);
|
||||
g_ota.phase = 0;
|
||||
g_ota.progress = (uint16_t)(i + 1);
|
||||
ota_param_store(&g_ota);
|
||||
boot_iwdg_feed();
|
||||
continue;
|
||||
}
|
||||
|
||||
/* 1) scratch ← A[i](持久保存被覆盖方) */
|
||||
APP_FlashRead(addr_a, buf, OTA_PAGE_SIZE);
|
||||
APP_FlashEraseWithCheck(OTA_SCRATCH_ADDR, OTA_SCRATCH_SIZE);
|
||||
APP_FlashWrite(OTA_SCRATCH_ADDR, buf, OTA_PAGE_SIZE);
|
||||
|
||||
g_ota.phase = 1;
|
||||
ota_param_store(&g_ota);
|
||||
|
||||
/* 2) A[i] ← B[i] */
|
||||
APP_FlashRead(addr_b, buf, OTA_PAGE_SIZE);
|
||||
APP_FlashEraseWithCheck(addr_a, OTA_PAGE_SIZE);
|
||||
APP_FlashWrite(addr_a, buf, OTA_PAGE_SIZE);
|
||||
|
||||
/* 3) B[i] ← scratch(原 A[i]) */
|
||||
APP_FlashRead(OTA_SCRATCH_ADDR, buf, OTA_PAGE_SIZE);
|
||||
APP_FlashEraseWithCheck(addr_b, OTA_PAGE_SIZE);
|
||||
APP_FlashWrite(addr_b, buf, OTA_PAGE_SIZE);
|
||||
|
||||
g_ota.phase = 0;
|
||||
g_ota.progress = (uint16_t)(i + 1);
|
||||
ota_param_store(&g_ota);
|
||||
boot_iwdg_feed();
|
||||
}
|
||||
|
||||
g_ota.state = reverse ? OTA_STATE_IDLE : OTA_STATE_BOOT_NEW;
|
||||
ota_param_store(&g_ota);
|
||||
Log("[BL] swap done, state=%u\r\n", g_ota.state);
|
||||
}
|
||||
|
||||
#else /* OTA_SWAP_STRATEGY == OTA_SWAP_RAM */
|
||||
|
||||
/**
|
||||
* @brief RAM 缓冲交换(不预留暂存区,A/B 各 55K;掉电恢复见 phase 说明)
|
||||
* @param reverse 0=正向(部署新) 1=反向(回滚)
|
||||
*
|
||||
* 正向每页顺序(关键:先部署新到 A,再备份旧到 B):
|
||||
* phase=1 写入后 → 擦/写 A[i](若中断,B[i] 仍是新固件页,可重建 A[i])
|
||||
* → 擦/写 B[i](若中断,旧固件页丢失,但新固件完整 → 升级成功、回滚失效)
|
||||
* 掉电恢复(phase==1 且 i==progress):从 B[i] 重建 A[i],
|
||||
* 放弃本页旧备份(B[i] 保持新固件页),继续后续页 —— 保证新固件永远可收敛。
|
||||
*/
|
||||
static void swap_execute(int reverse)
|
||||
{
|
||||
uint32_t a = OTA_RUN_ADDR_BASE;
|
||||
uint32_t b = OTA_BAK_ADDR_BASE;
|
||||
uint32_t i, total_pages = OTA_SLOT_PAGE_NB;
|
||||
uint8_t buf_new[OTA_PAGE_SIZE];
|
||||
uint8_t buf_old[OTA_PAGE_SIZE];
|
||||
|
||||
if (g_ota.state != OTA_STATE_SWAPPING)
|
||||
{
|
||||
g_ota.state = OTA_STATE_SWAPPING;
|
||||
g_ota.progress = 0;
|
||||
g_ota.phase = 0;
|
||||
ota_param_store(&g_ota);
|
||||
}
|
||||
Log("[BL] swap(%s) %lu pages (RAM buf)\r\n", reverse ? "rollback" : "forward",
|
||||
(unsigned long)total_pages);
|
||||
|
||||
for (i = g_ota.progress; i < total_pages; i++)
|
||||
{
|
||||
uint32_t addr_a = a + i * OTA_PAGE_SIZE;
|
||||
uint32_t addr_b = b + i * OTA_PAGE_SIZE;
|
||||
|
||||
/* 掉电恢复:phase==1 时 A[i] 可能半写,B[i] 必为新固件页(未动)→ 重建 A[i] */
|
||||
if ((g_ota.phase == 1) && (i == g_ota.progress))
|
||||
{
|
||||
APP_FlashRead(addr_b, buf_new, OTA_PAGE_SIZE);
|
||||
APP_FlashEraseWithCheck(addr_a, OTA_PAGE_SIZE);
|
||||
APP_FlashWrite(addr_a, buf_new, OTA_PAGE_SIZE);
|
||||
/* 旧固件页已在掉电时丢失 → 本页放弃旧备份(B[i] 保持新固件页) */
|
||||
g_ota.phase = 0;
|
||||
g_ota.progress = (uint16_t)(i + 1);
|
||||
ota_param_store(&g_ota);
|
||||
boot_iwdg_feed();
|
||||
continue;
|
||||
}
|
||||
|
||||
APP_FlashRead(addr_a, buf_old, OTA_PAGE_SIZE);
|
||||
APP_FlashRead(addr_b, buf_new, OTA_PAGE_SIZE);
|
||||
|
||||
/* 先写 A(部署新):中断时 B[i] 完好可重建 */
|
||||
g_ota.phase = 1;
|
||||
ota_param_store(&g_ota);
|
||||
APP_FlashEraseWithCheck(addr_a, OTA_PAGE_SIZE);
|
||||
APP_FlashWrite(addr_a, buf_new, OTA_PAGE_SIZE);
|
||||
|
||||
/* 再写 B(备份旧) */
|
||||
APP_FlashEraseWithCheck(addr_b, OTA_PAGE_SIZE);
|
||||
APP_FlashWrite(addr_b, buf_old, OTA_PAGE_SIZE);
|
||||
|
||||
g_ota.phase = 0;
|
||||
g_ota.progress = (uint16_t)(i + 1);
|
||||
ota_param_store(&g_ota);
|
||||
boot_iwdg_feed();
|
||||
}
|
||||
|
||||
g_ota.state = reverse ? OTA_STATE_IDLE : OTA_STATE_BOOT_NEW;
|
||||
ota_param_store(&g_ota);
|
||||
Log("[BL] swap done, state=%u\r\n", g_ota.state);
|
||||
}
|
||||
#endif /* OTA_SWAP_STRATEGY */
|
||||
|
||||
#endif /* OTA_BACKUP_MODE == AB */
|
||||
|
||||
/**
|
||||
* @brief Main program.
|
||||
* @retval int
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
HAL_Init();
|
||||
#ifdef DEBUG
|
||||
DEBUG_USART_Config(); /* 将串口配置成日志口 */
|
||||
#endif
|
||||
Log("\r\n==== PY32F040 OTA Bootloader V3.0 ====\r\n");
|
||||
#if (OTA_BACKUP_MODE == OTA_MODE_SINGLE)
|
||||
Log("[BL] mode: SINGLE backup\r\n");
|
||||
#else
|
||||
/* 双备份:OTA_SWAP_STRATEGY / OTA_SCRATCH_* 由 ota_config.h 的
|
||||
* #if (OTA_BACKUP_MODE == OTA_MODE_AB) 保护,此处一定已定义 */
|
||||
#if (OTA_SWAP_STRATEGY == OTA_SWAP_SCRATCH)
|
||||
Log("[BL] mode: AB backup, SCRATCH swap\r\n");
|
||||
#else
|
||||
Log("[BL] mode: AB backup, RAM swap\r\n");
|
||||
#endif
|
||||
#endif
|
||||
|
||||
ota_param_load(&g_ota);
|
||||
Log("[BL] state=%u fw_size=%lu\r\n", g_ota.state, (unsigned long)g_ota.fw_size);
|
||||
|
||||
#if (OTA_BACKUP_MODE == OTA_MODE_SINGLE)
|
||||
|
||||
/* ── ① 单备份 ── */
|
||||
switch (g_ota.state)
|
||||
{
|
||||
case OTA_STATE_PENDING:
|
||||
Log("[BL] Pending: validate BAK ...\r\n");
|
||||
if (fw_validate(OTA_BAK_ADDR_BASE, g_ota.fw_size, g_ota.fw_crc32))
|
||||
{
|
||||
boot_iwdg_enable();
|
||||
copy_bak_to_run();
|
||||
Log("[BL] Switch to NEW fw in RUN area\r\n");
|
||||
boot_jump(OTA_RUN_ADDR_BASE);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* 新固件无效 → 继续跑主区旧固件(BAK 被丢弃) */
|
||||
Log("[BL] New fw invalid, keep old RUN fw\r\n");
|
||||
g_ota.state = OTA_STATE_IDLE;
|
||||
ota_param_store(&g_ota);
|
||||
boot_iwdg_enable();
|
||||
boot_jump(OTA_RUN_ADDR_BASE);
|
||||
}
|
||||
break;
|
||||
|
||||
case OTA_STATE_BOOT_NEW:
|
||||
/* 单备份无回滚目标:App 未确认(崩溃/掉电)也只能继续运行主区 */
|
||||
Log("[BL] SINGLE: BOOT_NEW not confirmed, keep RUN fw\r\n");
|
||||
g_ota.state = OTA_STATE_IDLE;
|
||||
ota_param_store(&g_ota);
|
||||
boot_iwdg_enable();
|
||||
boot_jump(OTA_RUN_ADDR_BASE);
|
||||
break;
|
||||
|
||||
case OTA_STATE_IDLE:
|
||||
default:
|
||||
Log("[BL] Normal boot, RUN area\r\n");
|
||||
boot_iwdg_enable();
|
||||
boot_jump(OTA_RUN_ADDR_BASE);
|
||||
break;
|
||||
}
|
||||
|
||||
#else /* OTA_BACKUP_MODE == AB */
|
||||
|
||||
/* ── ②/③ 双备份 ── */
|
||||
switch (g_ota.state)
|
||||
{
|
||||
case OTA_STATE_PENDING:
|
||||
Log("[BL] Pending: validate B area ...\r\n");
|
||||
if (fw_validate(OTA_BAK_ADDR_BASE, g_ota.fw_size, g_ota.fw_crc32))
|
||||
{
|
||||
boot_iwdg_enable(); /* 交换期间逐页喂狗,跳转后由新固件喂狗 */
|
||||
swap_execute(0); /* 正向交换:A=新, B=旧 */
|
||||
Log("[BL] Switch to NEW fw\r\n");
|
||||
boot_jump(OTA_RUN_ADDR_BASE);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* 新固件无效 → 继续跑 A 区旧固件 */
|
||||
Log("[BL] New fw invalid, keep old RUN fw\r\n");
|
||||
g_ota.state = OTA_STATE_IDLE;
|
||||
ota_param_store(&g_ota);
|
||||
boot_iwdg_enable();
|
||||
boot_jump(OTA_RUN_ADDR_BASE);
|
||||
}
|
||||
break;
|
||||
|
||||
case OTA_STATE_SWAPPING:
|
||||
/* 上次交换掉电中断 → 续做(部署新固件) */
|
||||
Log("[BL] Resuming interrupted swap ...\r\n");
|
||||
boot_iwdg_enable();
|
||||
swap_execute(0);
|
||||
Log("[BL] Switch to NEW fw (resumed)\r\n");
|
||||
boot_jump(OTA_RUN_ADDR_BASE);
|
||||
break;
|
||||
|
||||
case OTA_STATE_BOOT_NEW:
|
||||
/* 上次启动的新固件未确认(崩溃/掉电)→ 回滚旧固件 */
|
||||
Log("[BL] New fw not confirmed, ROLLBACK ...\r\n");
|
||||
boot_iwdg_enable();
|
||||
swap_execute(1); /* 反向交换:A=旧, B=新 */
|
||||
Log("[BL] Rollback done, boot old fw\r\n");
|
||||
boot_jump(OTA_RUN_ADDR_BASE);
|
||||
break;
|
||||
|
||||
case OTA_STATE_IDLE:
|
||||
default:
|
||||
Log("[BL] Normal boot, RUN area\r\n");
|
||||
boot_iwdg_enable();
|
||||
boot_jump(OTA_RUN_ADDR_BASE);
|
||||
break;
|
||||
}
|
||||
|
||||
#endif /* OTA_BACKUP_MODE */
|
||||
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: Error_Handler
|
||||
* @brief 错误处理函数
|
||||
* @param *file:文件名,line:行号
|
||||
* @return None
|
||||
***********************************************************************************************************************/
|
||||
void Error_Handler(uint8_t *file, uint32_t line)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
appPrintf(LOG_ERROR, "%s %d\r\n", file, line);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef USE_FULL_ASSERT
|
||||
void assert_failed(uint8_t *file, uint32_t line)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
/************************ (C) COPYRIGHT Puya *****END OF FILE******************/
|
||||
@@ -0,0 +1,51 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file py32f040_hal_msp.c
|
||||
* @author MCU Application Team
|
||||
* @brief This file provides code for the MSP Initialization
|
||||
* and de-Initialization codes.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2023 Puya Semiconductor Co.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by Puya under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "boot_main.h"
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* External functions --------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief Initialize global MSP.
|
||||
*/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
}
|
||||
|
||||
/************************ (C) COPYRIGHT Puya *****END OF FILE******************/
|
||||
@@ -0,0 +1,93 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file py32f040_it.c
|
||||
* @author MCU Application Team
|
||||
* @brief Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2023 Puya Semiconductor Co.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by Puya under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "boot_main.h"
|
||||
#include "py32f040_it.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* External variables --------------------------------------------------------*/
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M0+ Processor Interruption and Exception Handlers */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles Non maskable interrupt.
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard fault interrupt.
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
HAL_IncTick();
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* PY32F040 Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||
/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file. */
|
||||
/******************************************************************************/
|
||||
|
||||
/************************ (C) COPYRIGHT Puya *****END OF FILE******************/
|
||||
@@ -0,0 +1,154 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_py32f040.c
|
||||
* @author MCU Application Team
|
||||
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer System Source File
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2023 Puya Semiconductor Co.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by Puya under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
#include "py32f0xx.h"
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE 32768U /*!< Value of LSI in Hz*/
|
||||
#endif /* LSI_VALUE */
|
||||
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE 32768U /*!< Value of LSE in Hz*/
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
Internal SRAM. */
|
||||
/* #define FORBID_VECT_TAB_MIGRATION */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x100. */
|
||||
/******************************************************************************/
|
||||
/*----------------------------------------------------------------------------
|
||||
Clock Variable definitions
|
||||
*----------------------------------------------------------------------------*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = HSI_VALUE;
|
||||
|
||||
const uint32_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint32_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||
const uint32_t HSIFreqTable[8] = {4000000U, 8000000U, 16000000U, 22120000U, 24000000U, 4000000U, 4000000U, 4000000U};
|
||||
|
||||
/**
|
||||
* @brief Clock functions.
|
||||
* @param none
|
||||
* @return none
|
||||
*/
|
||||
void SystemCoreClockUpdate(void) /* Get Core Clock Frequency */
|
||||
{
|
||||
uint32_t tmp;
|
||||
uint32_t hsidiv;
|
||||
uint32_t hsifs;
|
||||
#if defined(RCC_PLL_SUPPORT)
|
||||
uint32_t pllmul=0;
|
||||
const uint8_t pllMulValue[4] = {2,3,2,2};
|
||||
#endif /* RCC_PLL_SUPPORT */
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
switch (RCC->CFGR & RCC_CFGR_SWS)
|
||||
{
|
||||
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
|
||||
case RCC_SYSCLKSOURCE_STATUS_LSI: /* LSI used as system clock */
|
||||
SystemCoreClock = LSI_VALUE;
|
||||
break;
|
||||
#if defined(RCC_LSE_SUPPORT)
|
||||
case RCC_SYSCLKSOURCE_STATUS_LSE: /* LSE used as system clock */
|
||||
SystemCoreClock = LSE_VALUE;
|
||||
break;
|
||||
#endif /* RCC_LSE_SUPPORT */
|
||||
#if defined(RCC_PLL_SUPPORT)
|
||||
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
|
||||
pllmul = pllMulValue[((RCC->PLLCFGR & RCC_PLLCFGR_PLLMUL)>>RCC_PLLCFGR_PLLMUL_Pos)] ;
|
||||
|
||||
if ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI) /* HSI used as PLL clock source */
|
||||
{
|
||||
hsifs = ((READ_BIT(RCC->ICSCR, RCC_ICSCR_HSI_FS)) >> RCC_ICSCR_HSI_FS_Pos);
|
||||
SystemCoreClock = pllmul * (HSIFreqTable[hsifs]);
|
||||
}
|
||||
else /* HSE used as PLL clock source */
|
||||
{
|
||||
SystemCoreClock = pllmul * HSE_VALUE;
|
||||
}
|
||||
break;
|
||||
#endif /* RCC_PLL_SUPPORT */
|
||||
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock */
|
||||
default: /* HSI used as system clock */
|
||||
hsifs = ((READ_BIT(RCC->ICSCR, RCC_ICSCR_HSI_FS)) >> RCC_ICSCR_HSI_FS_Pos);
|
||||
hsidiv = (1UL << ((READ_BIT(RCC->CR, RCC_CR_HSIDIV)) >> RCC_CR_HSIDIV_Pos));
|
||||
SystemCoreClock = (HSIFreqTable[hsifs] / hsidiv);
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK clock frequency --------------------------------------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system.
|
||||
* Initialize the System.
|
||||
* @param none
|
||||
* @return none
|
||||
*/
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* Set the HSI clock to 8MHz by default */
|
||||
/* Set the LSI clock to 32.768KHz by default */
|
||||
RCC->ICSCR = (RCC->ICSCR & 0xFE000000) | (0x1 << 13) | ((*(uint32_t *)(0x1fff3208)) & 0x0000FFFF) | ((*(uint32_t *)(0x1fff3348))<<16);
|
||||
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#else
|
||||
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||
#endif /* VECT_TAB_SRAM */
|
||||
}
|
||||
|
||||
/************************ (C) COPYRIGHT Puya *****END OF FILE******************/
|
||||
Reference in New Issue
Block a user