添加普冉 PY32F040 OTA 双工程代码生成模板
Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
Cursor
@@ -0,0 +1,526 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
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<SchemaVersion>2.1</SchemaVersion>
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||||
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||||
<Header>### uVision Project, (C) Keil Software</Header>
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||||
|
||||
<Targets>
|
||||
<Target>
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||||
<TargetName>Project</TargetName>
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||||
<ToolsetNumber>0x4</ToolsetNumber>
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||||
<ToolsetName>ARM-ADS</ToolsetName>
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||||
<pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARM_Compiler_5.06u7</pCCUsed>
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||||
<uAC6>0</uAC6>
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||||
<TargetOption>
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||||
<TargetCommonOption>
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||||
<Device>PY32F040xB</Device>
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||||
<Vendor>Puya</Vendor>
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||||
<PackID>Puya.PY32F0xx_DFP.1.2.0</PackID>
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||||
<PackURL>https://www.puyasemi.com/uploadfiles/</PackURL>
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||||
<Cpu>IRAM(0x20000000,0x00004000) IROM(0x08000000,0x00020000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE</Cpu>
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||||
<FlashUtilSpec></FlashUtilSpec>
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||||
<StartupFile></StartupFile>
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||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0PY32F040xx_128 -FS08000000 -FL020000 -FP0($$Device:PY32F040xB$CMSIS\Flash\PY32F040xx_128.FLM))</FlashDriverDll>
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||||
<DeviceId>0</DeviceId>
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||||
<RegisterFile>$$Device:PY32F040xB$Drivers\CMSIS\Device\Puya\PY32F0xx\Include\py32f0xx.h</RegisterFile>
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||||
<MemoryEnv></MemoryEnv>
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||||
<Cmp></Cmp>
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||||
<Asm></Asm>
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||||
<Linker></Linker>
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||||
<OHString></OHString>
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||||
<InfinionOptionDll></InfinionOptionDll>
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||||
<SLE66CMisc></SLE66CMisc>
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||||
<SLE66AMisc></SLE66AMisc>
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||||
<SLE66LinkerMisc></SLE66LinkerMisc>
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||||
<SFDFile>$$Device:PY32F040xB$CMSIS\SVD\PY32F040xx.svd</SFDFile>
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||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
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<BinPath></BinPath>
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||||
<IncludePath></IncludePath>
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<LibPath></LibPath>
|
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<RegisterFilePath></RegisterFilePath>
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<DBRegisterFilePath></DBRegisterFilePath>
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<TargetStatus>
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<Error>0</Error>
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<ExitCodeStop>0</ExitCodeStop>
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<ButtonStop>0</ButtonStop>
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<NotGenerated>0</NotGenerated>
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<InvalidFlash>1</InvalidFlash>
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</TargetStatus>
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<OutputDirectory>.\Output\</OutputDirectory>
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<OutputName>Project</OutputName>
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<CreateExecutable>1</CreateExecutable>
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<DebugInformation>1</DebugInformation>
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<BrowseInformation>1</BrowseInformation>
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<ListingPath>.\Output\</ListingPath>
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<HexFormatSelection>1</HexFormatSelection>
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<StopOnExitCode>3</StopOnExitCode>
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<CustomArgument></CustomArgument>
|
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<IncludeLibraryModules></IncludeLibraryModules>
|
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<ComprImg>1</ComprImg>
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||||
</CommonProperty>
|
||||
<DllOption>
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||||
<SimDllName>SARMCM3.DLL</SimDllName>
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||||
<SimDllArguments> -REMAP </SimDllArguments>
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||||
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM0+</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> </TargetDllArguments>
|
||||
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM0+</TargetDlgDllArguments>
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||||
</DllOption>
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<DebugOption>
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||||
<OPTHX>
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<HexSelection>1</HexSelection>
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<HexRangeLowAddress>0</HexRangeLowAddress>
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<HexRangeHighAddress>0</HexRangeHighAddress>
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<HexOffset>0</HexOffset>
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<Oh166RecLen>16</Oh166RecLen>
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</OPTHX>
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||||
</DebugOption>
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||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
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||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
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||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
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||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
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||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
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||||
<FcArmLst>0</FcArmLst>
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||||
</Utilities>
|
||||
<TargetArmAds>
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||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
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||||
<asAsm>1</asAsm>
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<asMacX>1</asMacX>
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<asSyms>1</asSyms>
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<asFals>1</asFals>
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<asDbgD>1</asDbgD>
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<asForm>1</asForm>
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<ldLst>0</ldLst>
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<ldmm>1</ldmm>
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<ldXref>1</ldXref>
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<BigEnd>0</BigEnd>
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<AdsALst>1</AdsALst>
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<AdsACrf>1</AdsACrf>
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<AdsANop>0</AdsANop>
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<AdsANot>0</AdsANot>
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<AdsLLst>1</AdsLLst>
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<AdsLmap>1</AdsLmap>
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<AdsLsxf>1</AdsLsxf>
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<RvctClst>0</RvctClst>
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<GenPPlst>0</GenPPlst>
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<AdsCpuType>"Cortex-M0+"</AdsCpuType>
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<RvctDeviceName></RvctDeviceName>
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<mOS>0</mOS>
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<uocRom>0</uocRom>
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<CodeSel>0</CodeSel>
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<OptFeed>0</OptFeed>
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<Ir1Chk>1</Ir1Chk>
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<Ir2Chk>0</Ir2Chk>
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<Ra1Chk>0</Ra1Chk>
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<Ra2Chk>0</Ra2Chk>
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<Ra3Chk>0</Ra3Chk>
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<Im1Chk>1</Im1Chk>
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<Im2Chk>0</Im2Chk>
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<OnChipMemories>
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<Ocm1>
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<IRAM>
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||||
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<Size>0x4000</Size>
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||||
</IRAM>
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||||
<IROM>
|
||||
<Type>1</Type>
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<StartAddress>0x8000000</StartAddress>
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||||
<Size>0x20000</Size>
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||||
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||||
<XRAM>
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||||
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</OnChipMemories>
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||||
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||||
</ArmAdsMisc>
|
||||
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|
||||
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||||
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||||
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|
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||||
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|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>USE_HAL_DRIVER,PY32F040xB</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\Inc;..\..\Shared;..\..\Drivers\BSP\PY32F040xx_Start_Kit;..\..\Drivers\CMSIS\Include;..\..\Drivers\CMSIS\Device\PY32F040\Include;..\..\Drivers\PY32F040_HAL_Driver\Inc;..\Code;..\..\Shared</IncludePath>
|
||||
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||||
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||||
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||||
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||||
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<Define></Define>
|
||||
<Undefine></Undefine>
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||||
<IncludePath></IncludePath>
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||||
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||||
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|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Common</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup_py32f040xx.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\startup_py32f040xx.s</FilePath>
|
||||
</File>
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||||
<File>
|
||||
<FileName>system_py32f040.c</FileName>
|
||||
<FileType>1</FileType>
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||||
<FilePath>..\Src\system_py32f040.c</FilePath>
|
||||
</File>
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||||
</Files>
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||||
</Group>
|
||||
<Group>
|
||||
<GroupName>User</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>py32f040_hal_msp.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Src\py32f040_hal_msp.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_it.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Src\py32f040_it.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>boot_main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Src\boot_main.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Core</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>flash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Shared\flash.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>crc32.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Shared\crc32.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>PY32F040xx_Start_Kit</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>py32f040xx_Start_Kit.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\BSP\PY32F040xx_Start_Kit\py32f040xx_Start_Kit.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>PY32F040_HAL_Driver</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>py32f040_hal_flash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_flash.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_rcc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_rcc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_pwr.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_pwr.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_rcc_ex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_rcc_ex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_cortex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_cortex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_uart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>py32f040_hal_dma.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Drivers\PY32F040_HAL_Driver\Src\py32f040_hal_dma.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Doc</GroupName>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="Project"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
<LayerInfo>
|
||||
<Layers>
|
||||
<Layer>
|
||||
<LayName>Bootloder</LayName>
|
||||
<LayPrjMark>1</LayPrjMark>
|
||||
</Layer>
|
||||
</Layers>
|
||||
</LayerInfo>
|
||||
|
||||
</Project>
|
||||
@@ -0,0 +1,30 @@
|
||||
// File: PY32F040xx.dbgconf
|
||||
// Version: 1.0.0
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <h> Debug MCU configuration register (DBGMCU_CR)
|
||||
// <o.1> DBG_STOP <i> Debug stop mode
|
||||
// </h>
|
||||
DbgMCU_CR = 0x00000002;
|
||||
|
||||
// <h> Debug MCU APB freeze1 register (DBG_APB_FZ1)
|
||||
// <i> Reserved bits must be kept at reset value
|
||||
// <o.31> DBG_LPTIM_STOP <i> LPTIM stopped when core is halted
|
||||
// <o.12> DBG_IWDG_STOP <i> Independent watchdog stopped when core is halted
|
||||
// <o.11> DBG_WWDG_STOP <i> Window watchdog stopped when core is halted
|
||||
// <o.10> DBG_RTC_STOP <i> RTC stopped when core is halted
|
||||
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
|
||||
// </h>
|
||||
DbgMCU_APB_Fz1 = 0x00000000;
|
||||
|
||||
// <h> Debug MCU APB freeze2 register (DBG_APB_FZ2)
|
||||
// <i> Reserved bits must be kept at reset value
|
||||
// <o.18> DBG_TIM17_STOP <i> TIM17 counter stopped when core is halted
|
||||
// <o.17> DBG_TIM16_STOP <i> TIM16 counter stopped when core is halted
|
||||
// <o.15> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
|
||||
// <o.11> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
|
||||
// </h>
|
||||
DbgMCU_APB_Fz2 = 0x00000000;
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
@@ -0,0 +1,21 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'Bootloader'
|
||||
* Target: 'Project'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "py32f0xx.h"
|
||||
|
||||
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
@@ -0,0 +1,262 @@
|
||||
;******************************************************************************
|
||||
;* @file startup_py32f040xx.s
|
||||
;* @author MCU Application Team
|
||||
;* @brief PY32F040xx devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM0+ processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;******************************************************************************
|
||||
;* @attention
|
||||
;*
|
||||
;* <h2><center>© Copyright (c) 2023 Puya Semiconductor Co.
|
||||
;* All rights reserved.</center></h2>
|
||||
;*
|
||||
;* This software component is licensed by Puya under BSD 3-Clause license,
|
||||
;* the "License"; You may not use this file except in compliance with the
|
||||
;* License. You may obtain a copy of the License at:
|
||||
;* opensource.org/licenses/BSD-3-Clause
|
||||
;*
|
||||
;******************************************************************************
|
||||
;* @attention
|
||||
;*
|
||||
;* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
;* All rights reserved.</center></h2>
|
||||
;*
|
||||
;* This software component is licensed by ST under BSD 3-Clause license,
|
||||
;* the "License"; You may not use this file except in compliance with the
|
||||
;* License. You may obtain a copy of the License at:
|
||||
;* opensource.org/licenses/BSD-3-Clause
|
||||
;*
|
||||
;******************************************************************************
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; 0Window Watchdog
|
||||
DCD PVD_IRQHandler ; 1PVD through EXTI Line detect
|
||||
DCD RTC_IRQHandler ; 2RTC through EXTI Line
|
||||
DCD FLASH_IRQHandler ; 3FLASH
|
||||
DCD RCC_IRQHandler ; 4RCC
|
||||
DCD EXTI0_1_IRQHandler ; 5EXTI Line 0 and 1
|
||||
DCD EXTI2_3_IRQHandler ; 6EXTI Line 2 and 3
|
||||
DCD EXTI4_15_IRQHandler ; 7EXTI Line 4 to 15
|
||||
DCD LCD_IRQHandler ; 8LCD
|
||||
DCD DMA1_Channel1_IRQHandler ; 9DMA1 Channel 1
|
||||
DCD DMA1_Channel2_3_IRQHandler ; 10DMA1 Channel 2 and Channel 3
|
||||
DCD DMA1_Channel4_5_6_7_IRQHandler ; 11DMA1 Channel 4, Channel 5, Channel 6, Channel 7
|
||||
DCD ADC_COMP_IRQHandler ; 12ADC&COMP
|
||||
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; 13TIM1 Break, Update, Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; 14TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; 15TIM2
|
||||
DCD TIM3_IRQHandler ; 16TIM3
|
||||
DCD TIM6_LPTIM1_IRQHandler ; 17TIM6&LPTIM1
|
||||
DCD TIM7_IRQHandler ; 18TIM7
|
||||
DCD TIM14_IRQHandler ; 19TIM14
|
||||
DCD TIM15_IRQHandler ; 20TIM15
|
||||
DCD TIM16_IRQHandler ; 21TIM16
|
||||
DCD TIM17_IRQHandler ; 22TIM17
|
||||
DCD I2C1_IRQHandler ; 23I2C1
|
||||
DCD I2C2_IRQHandler ; 24I2C2
|
||||
DCD SPI1_IRQHandler ; 25SPI1
|
||||
DCD SPI2_IRQHandler ; 26SPI2
|
||||
DCD USART1_IRQHandler ; 27USART1
|
||||
DCD USART2_IRQHandler ; 28USART2
|
||||
DCD USART3_4_IRQHandler ; 29USART3&USART4
|
||||
DCD 0 ; 30Reserved
|
||||
DCD 0 ; 31Reserved
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_15_IRQHandler [WEAK]
|
||||
EXPORT LCD_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_5_6_7_IRQHandler [WEAK]
|
||||
EXPORT ADC_COMP_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM6_LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT TIM14_IRQHandler [WEAK]
|
||||
EXPORT TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM17_IRQHandler [WEAK]
|
||||
EXPORT I2C1_IRQHandler [WEAK]
|
||||
EXPORT I2C2_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_4_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
RTC_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_1_IRQHandler
|
||||
EXTI2_3_IRQHandler
|
||||
EXTI4_15_IRQHandler
|
||||
LCD_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_3_IRQHandler
|
||||
DMA1_Channel4_5_6_7_IRQHandler
|
||||
ADC_COMP_IRQHandler
|
||||
TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM6_LPTIM1_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
TIM14_IRQHandler
|
||||
TIM15_IRQHandler
|
||||
TIM16_IRQHandler
|
||||
TIM17_IRQHandler
|
||||
I2C1_IRQHandler
|
||||
I2C2_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_4_IRQHandler
|
||||
B .
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT Puya *****END OF FILE*******************
|
||||
Reference in New Issue
Block a user