555 lines
19 KiB
C
555 lines
19 KiB
C
/**
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******************************************************************************
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* @file py32f0xx_hal.h
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* @author MCU Application Team
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* @brief This file contains all the functions prototypes for the HAL
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* module driver.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2023 Puya Semiconductor Co.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by Puya under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __PY32F040_HAL_H
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#define __PY32F040_HAL_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "py32f040_hal_conf.h"
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/** @addtogroup PY32F040_HAL_Driver
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* @{
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*/
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/** @addtogroup HAL
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* @{
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup HAL_Exported_Constants HAL Exported Constants
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* @{
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*/
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/** @defgroup HAL_TICK_FREQ Tick Frequency
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* @{
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*/
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typedef enum
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{
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HAL_TICK_FREQ_10HZ = 100U,
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HAL_TICK_FREQ_100HZ = 10U,
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HAL_TICK_FREQ_1KHZ = 1U,
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HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
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} HAL_TickFreqTypeDef;
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported types ------------------------------------------------------------*/
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/* Exported variables --------------------------------------------------------*/
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/** @addtogroup HAL_Exported_Variables
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* @{
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*/
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extern uint32_t uwTickPrio;
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extern uint32_t uwTickFreq;
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/**
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* @}
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*/
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/** @defgroup SYSCFG_Exported_Constants SYSCFG Exported Constants
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* @{
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*/
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/** @defgroup SYSCFG_BootMode Boot Mode
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* @{
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*/
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#define SYSCFG_BOOT_MAINFLASH 0x00000000U /*!< Main Flash memory mapped at 0x0000 0000 */
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#define SYSCFG_BOOT_SYSTEMFLASH SYSCFG_CFGR1_MEM_MODE_0 /*!< System Flash memory mapped at 0x0000 0000 */
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#define SYSCFG_BOOT_SRAM (SYSCFG_CFGR1_MEM_MODE_1 | SYSCFG_CFGR1_MEM_MODE_0) /*!< Embedded SRAM mapped at 0x0000 0000 */
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/**
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* @}
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*/
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#if defined(SYSCFG_CFGR1_ETR_SRC_TIM3)
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/** @defgroup SYSCFG_ETR_SRC_TIM3 TIM3 ETR SRC
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* @{
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*/
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#define SYSCFG_ETR_SRC_TIM3_GPIO 0x00000000
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#define SYSCFG_ETR_SRC_TIM3_COMP1 SYSCFG_CFGR1_ETR_SRC_TIM3_0
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#define SYSCFG_ETR_SRC_TIM3_COMP2 SYSCFG_CFGR1_ETR_SRC_TIM3_1
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#define SYSCFG_ETR_SRC_TIM3_ADC (SYSCFG_CFGR1_ETR_SRC_TIM3_1 | SYSCFG_CFGR1_ETR_SRC_TIM3_0)
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#if defined(COMP3)
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#define SYSCFG_ETR_SRC_TIM3_COMP3 SYSCFG_CFGR1_ETR_SRC_TIM3_2
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#endif /* COMP3 */
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/**
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* @}
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*/
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#endif /* SYSCFG_CFGR1_ETR_SRC_TIM3 */
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#if defined(SYSCFG_CFGR1_ETR_SRC_TIM2)
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/** @defgroup SYSCFG_ETR_SRC_TIM2 TIM2 ETR SRC
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* @{
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*/
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#define SYSCFG_ETR_SRC_TIM2_GPIO 0x00000000
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#define SYSCFG_ETR_SRC_TIM2_COMP1 SYSCFG_CFGR1_ETR_SRC_TIM2_0
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#define SYSCFG_ETR_SRC_TIM2_COMP2 SYSCFG_CFGR1_ETR_SRC_TIM2_1
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#define SYSCFG_ETR_SRC_TIM2_ADC (SYSCFG_CFGR1_ETR_SRC_TIM2_1 | SYSCFG_CFGR1_ETR_SRC_TIM2_0)
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#if defined(COMP3)
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#define SYSCFG_ETR_SRC_TIM2_COMP3 SYSCFG_CFGR1_ETR_SRC_TIM2_2
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#endif /* COMP3 */
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/**
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* @}
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*/
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#endif /* SYSCFG_CFGR1_ETR_SRC_TIM2 */
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#if defined(SYSCFG_CFGR1_ETR_SRC_TIM1)
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/** @defgroup SYSCFG_ETR_SRC_TIM1 TIM1 ETR SRC
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* @{
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*/
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#define SYSCFG_ETR_SRC_TIM1_GPIO 0x00000000
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#define SYSCFG_ETR_SRC_TIM1_COMP1 SYSCFG_CFGR1_ETR_SRC_TIM1_0
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#define SYSCFG_ETR_SRC_TIM1_COMP2 SYSCFG_CFGR1_ETR_SRC_TIM1_1
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#define SYSCFG_ETR_SRC_TIM1_ADC (SYSCFG_CFGR1_ETR_SRC_TIM1_1 | SYSCFG_CFGR1_ETR_SRC_TIM1_0)
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#if defined(COMP3)
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#define SYSCFG_ETR_SRC_TIM1_COMP3 SYSCFG_CFGR1_ETR_SRC_TIM1_2
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#endif /* COMP3 */
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/**
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* @}
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*/
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#endif /* SYSCFG_CFGR1_ETR_SRC_TIM1 */
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#if defined(SYSCFG_CFGR1_TIM3_IC1_SRC)
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/** @defgroup SYSCFG_TIM3_IC1_SRC TIM3 IC1 SRC
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* @{
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*/
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#define SYSCFG_TIM3_IC1_SRC_TIM3CH1IO 0x00000000
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#define SYSCFG_TIM3_IC1_SRC_COMP1 SYSCFG_CFGR1_TIM3_IC1_SRC_0
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#define SYSCFG_TIM3_IC1_SRC_COMP2 SYSCFG_CFGR1_TIM3_IC1_SRC_1
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#if defined(COMP3)
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#define SYSCFG_TIM3_IC1_SRC_COMP3 (SYSCFG_CFGR1_TIM3_IC1_SRC_1 | SYSCFG_CFGR1_TIM3_IC1_SRC_0)
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#endif /* COMP3 */
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/**
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* @}
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*/
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#endif /* SYSCFG_CFGR1_TIM3_IC1_SRC */
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#if defined(SYSCFG_CFGR1_TIM2_IC4_SRC)
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/** @defgroup SYSCFG_TIM2_IC4_SRC TIM2 IC4 SRC
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* @{
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*/
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#define SYSCFG_TIM2_IC4_SRC_TIM2CH4IO 0x00000000
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#define SYSCFG_TIM2_IC4_SRC_COMP1 SYSCFG_CFGR1_TIM2_IC4_SRC_0
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#define SYSCFG_TIM2_IC4_SRC_COMP2 SYSCFG_CFGR1_TIM2_IC4_SRC_1
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#if defined(COMP3)
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#define SYSCFG_TIM2_IC4_SRC_COMP3 (SYSCFG_CFGR1_TIM2_IC4_SRC_1 | SYSCFG_CFGR1_TIM2_IC4_SRC_0)
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#endif /* COMP3 */
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/**
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* @}
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*/
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#endif /* SYSCFG_CFGR1_TIM2_IC4_SRC */
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#if defined(SYSCFG_CFGR1_TIM1_IC1_SRC)
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/** @defgroup SYSCFG_TIM1_IC1_SRC TIM1 IC1 SRC
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* @{
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*/
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#define SYSCFG_TIM1_IC1_SRC_TIM1CH1IO 0x00000000
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#define SYSCFG_TIM1_IC1_SRC_COMP1 SYSCFG_CFGR1_TIM1_IC1_SRC_0
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#define SYSCFG_TIM1_IC1_SRC_COMP2 SYSCFG_CFGR1_TIM1_IC1_SRC_1
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#if defined(COMP3)
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#define SYSCFG_TIM1_IC1_SRC_COMP3 (SYSCFG_CFGR1_TIM1_IC1_SRC_1 | SYSCFG_CFGR1_TIM1_IC1_SRC_0)
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#endif /* COMP3 */
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/**
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* @}
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*/
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#endif /* SYSCFG_CFGR1_TIM1_IC1_SRC */
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/**
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* @}
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*/
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/* Exported macros -----------------------------------------------------------*/
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/** @defgroup HAL_Exported_Macros HAL Exported Macros
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* @{
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*/
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/** @defgroup HAL_Freeze_Unfreeze_Peripherals HAL Freeze Unfreeze Peripherals
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* @brief Freeze/Unfreeze Peripherals in Debug mode
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* @{
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*/
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#if defined(DBGMCU_APB_FZ1_DBG_LPTIM_STOP)
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#define __HAL_DBGMCU_FREEZE_LPTIM_STOP() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_LPTIM_STOP))
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#define __HAL_DBGMCU_UNFREEZE_LPTIM_STOP() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_LPTIM_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_LPTIM_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_RTC_STOP)
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#define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_RTC_STOP))
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#define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_RTC_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_RTC_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_I2C_SMBUS_TIMEOUT)
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#define __HAL_DBGMCU_FREEZE_I2C_TIMEOUT() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_I2C_SMBUS_TIMEOUT))
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#define __HAL_DBGMCU_UNFREEZE_I2C_TIMEOUT() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_I2C_SMBUS_TIMEOUT))
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#endif /* DBGMCU_APB_FZ_DBG_I2C_SMBUS_TIMEOUT */
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#if defined(DBGMCU_APB_FZ1_DBG_I2C1_SMBUS_TIMEOUT)
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#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_I2C1_SMBUS_TIMEOUT))
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#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_I2C_SMBUS_TIMEOUT))
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#endif /* DBGMCU_APB_FZ_DBG_I2C1_SMBUS_TIMEOUT */
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#if defined(DBGMCU_APB_FZ1_DBG_I2C2_SMBUS_TIMEOUT)
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#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_I2C2_SMBUS_TIMEOUT))
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#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_I2C2_SMBUS_TIMEOUT))
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#endif /* DBGMCU_APB_FZ_DBG_I2C2_SMBUS_TIMEOUT */
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#if defined(DBGMCU_APB_FZ1_DBG_CAN_STOP)
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#define __HAL_DBGMCU_FREEZE_CAN_STOP() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_CAN_STOP))
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#define __HAL_DBGMCU_UNFREEZE_CAN_STOP() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_CAN_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_CAN_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_IWDG_STOP)
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#define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_IWDG_STOP))
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#define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_IWDG_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_IWDG_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_WWDG_STOP)
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#define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_WWDG_STOP))
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#define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_WWDG_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_WWDG_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_TIM2_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_TIM2_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_TIM2_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM2_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_TIM3_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_TIM3_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_TIM3_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM3_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_TIM6_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_TIM6_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_TIM6_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM6_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_TIM7_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_TIM7_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_TIM7_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM7_STOP */
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#if defined(DBGMCU_APB_FZ1_DBG_TIM14_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APBFZ1 |= (DBGMCU_APB_FZ1_DBG_TIM14_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APBFZ1 &= ~(DBGMCU_APB_FZ1_DBG_TIM14_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM14_STOP */
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#if defined(DBGMCU_APB_FZ2_DBG_TIM14_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APBFZ2 |= (DBGMCU_APB_FZ2_DBG_TIM14_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APBFZ2 &= ~(DBGMCU_APB_FZ2_DBG_TIM14_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM14_STOP */
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#if defined(DBGMCU_APB_FZ2_DBG_TIM1_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APBFZ2 |= (DBGMCU_APB_FZ2_DBG_TIM1_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APBFZ2 &= ~(DBGMCU_APB_FZ2_DBG_TIM1_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM1_STOP */
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#if defined(DBGMCU_APB_FZ2_DBG_TIM15_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM15() (DBGMCU->APBFZ2 |= (DBGMCU_APB_FZ2_DBG_TIM15_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM15() (DBGMCU->APBFZ2 &= ~(DBGMCU_APB_FZ2_DBG_TIM15_STOP))
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#endif /* DBGMCU_APB_FZ2_DBG_TIM15_STOP */
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#if defined(DBGMCU_APB_FZ2_DBG_TIM16_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM16() (DBGMCU->APBFZ2 |= (DBGMCU_APB_FZ2_DBG_TIM16_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM16() (DBGMCU->APBFZ2 &= ~(DBGMCU_APB_FZ2_DBG_TIM16_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM16_STOP */
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#if defined(DBGMCU_APB_FZ2_DBG_TIM17_STOP)
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#define __HAL_DBGMCU_FREEZE_TIM17() (DBGMCU->APBFZ2 |= (DBGMCU_APB_FZ2_DBG_TIM17_STOP))
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#define __HAL_DBGMCU_UNFREEZE_TIM17() (DBGMCU->APBFZ2 &= ~(DBGMCU_APB_FZ2_DBG_TIM17_STOP))
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#endif /* DBGMCU_APB_FZ_DBG_TIM17_STOP */
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/**
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* @}
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*/
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/** @defgroup SYSCFG_Exported_Macros SYSCFG Exported Macros
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* @{
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*/
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/** @brief SYSCFG Break Cortex-M0+ Lockup lock.
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* Enables and locks the connection of Cortex-M0+ LOCKUP (Hardfault) output to TIM1/15/16/17 Break input
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* @note The selected configuration is locked and can be unlocked only by system reset.
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*/
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#define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_LOCKUP_LOCK)
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#if defined(SYSCFG_CFGR2_PVD_LOCK)
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/** @brief SYSCFG Break PVD lock.
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* Enables and locks the PVD connection with Timer1/15/16/17 Break input, as well as the PVDE and PLS[2:0] in the PWR_CR register
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* @note The selected configuration is locked and can be unlocked only by system reset
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*/
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#define __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_PVD_LOCK)
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#endif
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#if defined(SYSCFG_CFGR2_COMP1_BRK_TIM1)
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/** @brief SYSCFG COMP1 AS TIMx break.
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* COMP1 as Timer1Break input
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* @note The selected configuration is locked and can be unlocked only by system reset
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*/
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#define __HAL_SYSCFG_COMP1_BREAK_TIM1() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP1_BRK_TIM1)
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#endif
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#if defined(SYSCFG_CFGR2_COMP2_BRK_TIM1)
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#define __HAL_SYSCFG_COMP2_BREAK_TIM1() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP2_BRK_TIM1)
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#endif
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#if defined(SYSCFG_CFGR2_COMP3_BRK_TIM1)
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#define __HAL_SYSCFG_COMP3_BREAK_TIM1() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP3_BRK_TIM1)
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#endif
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#if defined(SYSCFG_CFGR2_COMP1_BRK_TIM15)
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/** @brief SYSCFG COMP1 AS TIMx break.
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* COMP1 as Timer1Break input
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* @note The selected configuration is locked and can be unlocked only by system reset
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*/
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#define __HAL_SYSCFG_COMP1_BREAK_TIM15() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP1_BRK_TIM15)
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#endif
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#if defined(SYSCFG_CFGR2_COMP2_BRK_TIM15)
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#define __HAL_SYSCFG_COMP2_BREAK_TIM15() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP2_BRK_TIM15)
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#endif
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#if defined(SYSCFG_CFGR2_COMP3_BRK_TIM15)
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#define __HAL_SYSCFG_COMP3_BREAK_TIM15() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP3_BRK_TIM15)
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#endif
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#if defined(SYSCFG_CFGR2_COMP1_BRK_TIM16)
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#define __HAL_SYSCFG_COMP1_BREAK_TIM16() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP1_BRK_TIM16)
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#endif
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#if defined(SYSCFG_CFGR2_COMP2_BRK_TIM16)
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#define __HAL_SYSCFG_COMP2_BREAK_TIM16() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP2_BRK_TIM16)
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#endif
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#if defined(SYSCFG_CFGR2_COMP3_BRK_TIM16)
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#define __HAL_SYSCFG_COMP3_BREAK_TIM16() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP3_BRK_TIM16)
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#endif
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#if defined(SYSCFG_CFGR2_COMP1_BRK_TIM17)
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#define __HAL_SYSCFG_COMP1_BREAK_TIM17() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP1_BRK_TIM17)
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#endif
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#if defined(SYSCFG_CFGR2_COMP2_BRK_TIM17)
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#define __HAL_SYSCFG_COMP2_BREAK_TIM17() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP2_BRK_TIM17)
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#endif
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#if defined(SYSCFG_CFGR2_COMP3_BRK_TIM17)
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#define __HAL_SYSCFG_COMP3_BREAK_TIM17() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP3_BRK_TIM17)
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#endif
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#if defined(SYSCFG_CFGR2_COMP1_OCREF_CLR_TIM1)
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#define __HAL_SYSCFG_COMP1_OCREF_CLEAR_TIM1() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP1_OCREF_CLR_TIM1)
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#endif
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#if defined(SYSCFG_CFGR2_COMP1_OCREF_CLR_TIM2)
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#define __HAL_SYSCFG_COMP1_OCREF_CLEAR_TIM2() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP1_OCREF_CLR_TIM2)
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#endif
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#if defined(SYSCFG_CFGR2_COMP1_OCREF_CLR_TIM3)
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#define __HAL_SYSCFG_COMP1_OCREF_CLEAR_TIM3() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP1_OCREF_CLR_TIM3)
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#endif
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#if defined(SYSCFG_CFGR2_COMP2_OCREF_CLR_TIM1)
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#define __HAL_SYSCFG_COMP2_OCREF_CLEAR_TIM1() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP2_OCREF_CLR_TIM1)
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#endif
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#if defined(SYSCFG_CFGR2_COMP2_OCREF_CLR_TIM2)
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#define __HAL_SYSCFG_COMP2_OCREF_CLEAR_TIM2() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP2_OCREF_CLR_TIM2)
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#endif
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#if defined(SYSCFG_CFGR2_COMP1_OCREF_CLR_TIM3)
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#define __HAL_SYSCFG_COMP2_OCREF_CLEAR_TIM3() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP2_OCREF_CLR_TIM3)
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#endif
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#if defined(SYSCFG_CFGR2_COMP3_OCREF_CLR_TIM1)
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#define __HAL_SYSCFG_COMP3_OCREF_CLEAR_TIM1() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP3_OCREF_CLR_TIM1)
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#endif
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#if defined(SYSCFG_CFGR2_COMP3_OCREF_CLR_TIM2)
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|
#define __HAL_SYSCFG_COMP3_OCREF_CLEAR_TIM2() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP3_OCREF_CLR_TIM2)
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#endif
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|
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|
#if defined(SYSCFG_CFGR2_COMP3_OCREF_CLR_TIM3)
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|
#define __HAL_SYSCFG_COMP3_OCREF_CLEAR_TIM3() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_COMP3_OCREF_CLR_TIM3)
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|
#endif
|
|
|
|
#if defined(SYSCFG_CFGR1_GPIO_AHB_SEL)
|
|
#define __HAL_SYSCFG_GPIO_AHB() SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_GPIO_AHB_SEL)
|
|
#endif
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup HAL_Private_Macros HAL Private Macros
|
|
* @{
|
|
*/
|
|
#define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
|
|
((FREQ) == HAL_TICK_FREQ_100HZ) || \
|
|
((FREQ) == HAL_TICK_FREQ_1KHZ))
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Exported functions --------------------------------------------------------*/
|
|
|
|
/** @addtogroup HAL_Exported_Functions
|
|
* @{
|
|
*/
|
|
|
|
/** @addtogroup HAL_Exported_Functions_Group1
|
|
* @{
|
|
*/
|
|
|
|
/* Initialization and de-initialization functions ******************************/
|
|
HAL_StatusTypeDef HAL_Init(void);
|
|
HAL_StatusTypeDef HAL_DeInit(void);
|
|
void HAL_MspInit(void);
|
|
void HAL_MspDeInit(void);
|
|
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup HAL_Exported_Functions_Group2
|
|
* @{
|
|
*/
|
|
/* Peripheral Control functions ************************************************/
|
|
void HAL_IncTick(void);
|
|
void HAL_Delay(uint32_t Delay);
|
|
uint32_t HAL_GetTick(void);
|
|
uint32_t HAL_GetTickPrio(void);
|
|
HAL_StatusTypeDef HAL_SetTickFreq(uint32_t Freq);
|
|
uint32_t HAL_GetTickFreq(void);
|
|
void HAL_SuspendTick(void);
|
|
void HAL_ResumeTick(void);
|
|
uint32_t HAL_GetHalVersion(void);
|
|
uint32_t HAL_GetREVID(void);
|
|
uint32_t HAL_GetDEVID(void);
|
|
uint32_t HAL_GetUIDw0(void);
|
|
uint32_t HAL_GetUIDw1(void);
|
|
uint32_t HAL_GetUIDw2(void);
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup HAL_Exported_Functions_Group3
|
|
* @{
|
|
*/
|
|
/* HAL Debug functions *********************************************************/
|
|
#if defined(DBGMCU_CR_DBG_SLEEP)
|
|
void HAL_DBGMCU_EnableDBGMCUSleepMode(void);
|
|
void HAL_DBGMCU_DisableDBGMCUSleepMode(void);
|
|
#endif
|
|
#if defined(DBGMCU_CR_DBG_STOP)
|
|
void HAL_DBGMCU_EnableDBGMCUStopMode(void);
|
|
void HAL_DBGMCU_DisableDBGMCUStopMode(void);
|
|
#endif
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup HAL_Exported_Functions_Group4
|
|
* @{
|
|
*/
|
|
/* SYSCFG configuration functions **********************************************/
|
|
#if defined(SYSCFG_CFGR1_ETR_SRC_TIM1)
|
|
void HAL_SYSCFG_TIM1ETRSource(uint32_t ETRSource);
|
|
#endif
|
|
#if defined(SYSCFG_CFGR1_ETR_SRC_TIM2)
|
|
void HAL_SYSCFG_TIM2ETRSource(uint32_t ETRSource);
|
|
#endif
|
|
#if defined(SYSCFG_CFGR1_ETR_SRC_TIM3)
|
|
void HAL_SYSCFG_TIM3ETRSource(uint32_t ETRSource);
|
|
#endif
|
|
#if defined(SYSCFG_CFGR1_TIM3_IC1_SRC)
|
|
void HAL_SYSCFG_TIM3IC1Source(uint32_t ICSource);
|
|
#endif
|
|
#if defined(SYSCFG_CFGR1_TIM2_IC4_SRC)
|
|
void HAL_SYSCFG_TIM2IC4Source(uint32_t ICSource);
|
|
#endif
|
|
#if defined(SYSCFG_CFGR1_TIM1_IC1_SRC)
|
|
void HAL_SYSCFG_TIM1IC1Source(uint32_t ICSource);
|
|
#endif
|
|
|
|
void HAL_SYSCFG_EnableGPIONoiseFilter(GPIO_TypeDef *GPIOx,uint16_t GPIO_Pin);
|
|
void HAL_SYSCFG_DisableGPIONoiseFilter(GPIO_TypeDef *GPIOx,uint16_t GPIO_Pin);
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Private types -------------------------------------------------------------*/
|
|
/* Private variables ---------------------------------------------------------*/
|
|
/** @defgroup HAL_Private_Variables HAL Private Variables
|
|
* @{
|
|
*/
|
|
/**
|
|
* @}
|
|
*/
|
|
/* Private constants ---------------------------------------------------------*/
|
|
/** @defgroup HAL_Private_Constants HAL Private Constants
|
|
* @{
|
|
*/
|
|
/**
|
|
* @}
|
|
*/
|
|
/* Private macros ------------------------------------------------------------*/
|
|
/* Private functions ---------------------------------------------------------*/
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* __PY32F040_HAL_H */
|
|
|
|
/************************ (C) COPYRIGHT Puya *****END OF FILE****/
|